mirror of https://github.com/xemu-project/xemu.git
qtest/ahci: simple ncq data test
Test the NCQ pathways for a simple IO RW test. Also, test that libqos doesn't explode when running NCQ commands :) Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1435016308-6150-16-git-send-email-jsnow@redhat.com
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@ -1401,6 +1401,17 @@ static void test_reset(void)
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ahci_shutdown(ahci);
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ahci_shutdown(ahci);
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}
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}
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static void test_ncq_simple(void)
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{
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AHCIQState *ahci;
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ahci = ahci_boot_and_enable(NULL);
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ahci_test_io_rw_simple(ahci, 4096, 0,
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READ_FPDMA_QUEUED,
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WRITE_FPDMA_QUEUED);
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ahci_shutdown(ahci);
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}
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/******************************************************************************/
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/******************************************************************************/
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/* AHCI I/O Test Matrix Definitions */
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/* AHCI I/O Test Matrix Definitions */
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@ -1654,6 +1665,8 @@ int main(int argc, char **argv)
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qtest_add_func("/ahci/max", test_max);
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qtest_add_func("/ahci/max", test_max);
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qtest_add_func("/ahci/reset", test_reset);
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qtest_add_func("/ahci/reset", test_reset);
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qtest_add_func("/ahci/io/ncq/simple", test_ncq_simple);
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ret = g_test_run();
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ret = g_test_run();
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/* Cleanup */
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/* Cleanup */
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@ -50,27 +50,31 @@ typedef struct AHCICommandProp {
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} AHCICommandProp;
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} AHCICommandProp;
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AHCICommandProp ahci_command_properties[] = {
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AHCICommandProp ahci_command_properties[] = {
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{ .cmd = CMD_READ_PIO, .data = true, .pio = true,
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{ .cmd = CMD_READ_PIO, .data = true, .pio = true,
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.lba28 = true, .read = true },
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.lba28 = true, .read = true },
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{ .cmd = CMD_WRITE_PIO, .data = true, .pio = true,
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{ .cmd = CMD_WRITE_PIO, .data = true, .pio = true,
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.lba28 = true, .write = true },
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.lba28 = true, .write = true },
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{ .cmd = CMD_READ_PIO_EXT, .data = true, .pio = true,
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{ .cmd = CMD_READ_PIO_EXT, .data = true, .pio = true,
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.lba48 = true, .read = true },
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.lba48 = true, .read = true },
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{ .cmd = CMD_WRITE_PIO_EXT, .data = true, .pio = true,
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{ .cmd = CMD_WRITE_PIO_EXT, .data = true, .pio = true,
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.lba48 = true, .write = true },
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.lba48 = true, .write = true },
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{ .cmd = CMD_READ_DMA, .data = true, .dma = true,
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{ .cmd = CMD_READ_DMA, .data = true, .dma = true,
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.lba28 = true, .read = true },
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.lba28 = true, .read = true },
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{ .cmd = CMD_WRITE_DMA, .data = true, .dma = true,
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{ .cmd = CMD_WRITE_DMA, .data = true, .dma = true,
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.lba28 = true, .write = true },
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.lba28 = true, .write = true },
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{ .cmd = CMD_READ_DMA_EXT, .data = true, .dma = true,
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{ .cmd = CMD_READ_DMA_EXT, .data = true, .dma = true,
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.lba48 = true, .read = true },
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.lba48 = true, .read = true },
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{ .cmd = CMD_WRITE_DMA_EXT, .data = true, .dma = true,
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{ .cmd = CMD_WRITE_DMA_EXT, .data = true, .dma = true,
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.lba48 = true, .write = true },
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.lba48 = true, .write = true },
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{ .cmd = CMD_IDENTIFY, .data = true, .pio = true,
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{ .cmd = CMD_IDENTIFY, .data = true, .pio = true,
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.size = 512, .read = true },
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.size = 512, .read = true },
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{ .cmd = CMD_READ_MAX, .lba28 = true },
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{ .cmd = READ_FPDMA_QUEUED, .data = true, .dma = true,
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{ .cmd = CMD_READ_MAX_EXT, .lba48 = true },
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.lba48 = true, .read = true, .ncq = true },
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{ .cmd = CMD_FLUSH_CACHE, .data = false }
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{ .cmd = WRITE_FPDMA_QUEUED, .data = true, .dma = true,
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.lba48 = true, .write = true, .ncq = true },
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{ .cmd = CMD_READ_MAX, .lba28 = true },
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{ .cmd = CMD_READ_MAX_EXT, .lba48 = true },
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{ .cmd = CMD_FLUSH_CACHE, .data = false }
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};
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};
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struct AHCICommand {
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struct AHCICommand {
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@ -263,20 +263,23 @@ enum {
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/* ATA Commands */
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/* ATA Commands */
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enum {
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enum {
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/* DMA */
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/* DMA */
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CMD_READ_DMA = 0xC8,
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CMD_READ_DMA = 0xC8,
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CMD_READ_DMA_EXT = 0x25,
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CMD_READ_DMA_EXT = 0x25,
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CMD_WRITE_DMA = 0xCA,
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CMD_WRITE_DMA = 0xCA,
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CMD_WRITE_DMA_EXT = 0x35,
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CMD_WRITE_DMA_EXT = 0x35,
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/* PIO */
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/* PIO */
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CMD_READ_PIO = 0x20,
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CMD_READ_PIO = 0x20,
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CMD_READ_PIO_EXT = 0x24,
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CMD_READ_PIO_EXT = 0x24,
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CMD_WRITE_PIO = 0x30,
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CMD_WRITE_PIO = 0x30,
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CMD_WRITE_PIO_EXT = 0x34,
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CMD_WRITE_PIO_EXT = 0x34,
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/* Misc */
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/* Misc */
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CMD_READ_MAX = 0xF8,
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CMD_READ_MAX = 0xF8,
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CMD_READ_MAX_EXT = 0x27,
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CMD_READ_MAX_EXT = 0x27,
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CMD_FLUSH_CACHE = 0xE7,
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CMD_FLUSH_CACHE = 0xE7,
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CMD_IDENTIFY = 0xEC
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CMD_IDENTIFY = 0xEC,
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/* NCQ */
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READ_FPDMA_QUEUED = 0x60,
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WRITE_FPDMA_QUEUED = 0x61,
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};
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};
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/* AHCI Command Header Flags & Masks*/
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/* AHCI Command Header Flags & Masks*/
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