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target/i386: avoid calling gen_eob_inhibit_irq before tb_stop 

sti only has one exit, so it does not need to generate the
end-of-translation code inline.  It can be deferred to tb_stop.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2024-05-16 18:35:55 +02:00
parent c8494cb8b1
commit 2512f786bf
2 changed files with 1 additions and 16 deletions
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4
target/i386/tcg/emit.c.inc
View File

@ -3475,9 +3475,7 @@ static void gen_STD(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
static void gen_STI(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode) static void gen_STI(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{ {
gen_set_eflags(s, IF_MASK); gen_set_eflags(s, IF_MASK);
/* interruptions are enabled only the first insn after sti */ s->base.is_jmp = DISAS_EOB_INHIBIT_IRQ;
gen_update_eip_next(s);
gen_eob_inhibit_irq(s);
} }
static void gen_VAESKEYGEN(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode) static void gen_VAESKEYGEN(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)

13
target/i386/tcg/translate.c
View File

@ -564,19 +564,6 @@ static void gen_update_eip_cur(DisasContext *s)
s->pc_save = s->base.pc_next; s->pc_save = s->base.pc_next;
} }
static void gen_update_eip_next(DisasContext *s)
{
assert(s->pc_save != -1);
if (tb_cflags(s->base.tb) & CF_PCREL) {
tcg_gen_addi_tl(cpu_eip, cpu_eip, s->pc - s->pc_save);
} else if (CODE64(s)) {
tcg_gen_movi_tl(cpu_eip, s->pc);
} else {
tcg_gen_movi_tl(cpu_eip, (uint32_t)(s->pc - s->cs_base));
}
s->pc_save = s->pc;
}
static int cur_insn_len(DisasContext *s) static int cur_insn_len(DisasContext *s)
{ {
return s->pc - s->base.pc_next; return s->pc - s->base.pc_next;