mirror of https://github.com/xemu-project/xemu.git
hw/gpio: Add BCM2838 GPIO stub
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240226000259.2752893-7-sergey.kambalin@auriga.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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/*
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* Raspberry Pi (BCM2838) GPIO Controller
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* This implementation is based on bcm2835_gpio (hw/gpio/bcm2835_gpio.c)
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*
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* Copyright (c) 2022 Auriga LLC
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*
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* Authors:
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* Lotosh, Aleksey <aleksey.lotosh@auriga.com>
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*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#include "qemu/timer.h"
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#include "qapi/error.h"
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#include "hw/sysbus.h"
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#include "migration/vmstate.h"
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#include "hw/gpio/bcm2838_gpio.h"
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#define GPFSEL0 0x00
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#define GPFSEL1 0x04
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#define GPFSEL2 0x08
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#define GPFSEL3 0x0C
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#define GPFSEL4 0x10
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#define GPFSEL5 0x14
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#define GPSET0 0x1C
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#define GPSET1 0x20
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#define GPCLR0 0x28
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#define GPCLR1 0x2C
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#define GPLEV0 0x34
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#define GPLEV1 0x38
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#define GPEDS0 0x40
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#define GPEDS1 0x44
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#define GPREN0 0x4C
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#define GPREN1 0x50
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#define GPFEN0 0x58
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#define GPFEN1 0x5C
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#define GPHEN0 0x64
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#define GPHEN1 0x68
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#define GPLEN0 0x70
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#define GPLEN1 0x74
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#define GPAREN0 0x7C
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#define GPAREN1 0x80
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#define GPAFEN0 0x88
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#define GPAFEN1 0x8C
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#define GPIO_PUP_PDN_CNTRL_REG0 0xE4
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#define GPIO_PUP_PDN_CNTRL_REG1 0xE8
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#define GPIO_PUP_PDN_CNTRL_REG2 0xEC
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#define GPIO_PUP_PDN_CNTRL_REG3 0xF0
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#define RESET_VAL_CNTRL_REG0 0xAAA95555
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#define RESET_VAL_CNTRL_REG1 0xA0AAAAAA
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#define RESET_VAL_CNTRL_REG2 0x50AAA95A
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#define RESET_VAL_CNTRL_REG3 0x00055555
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#define BYTES_IN_WORD 4
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static uint64_t bcm2838_gpio_read(void *opaque, hwaddr offset, unsigned size)
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{
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uint64_t value = 0;
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qemu_log_mask(LOG_UNIMP, "%s: %s: not implemented for %"HWADDR_PRIx"\n",
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TYPE_BCM2838_GPIO, __func__, offset);
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return value;
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}
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static void bcm2838_gpio_write(void *opaque, hwaddr offset, uint64_t value,
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unsigned size)
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{
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qemu_log_mask(LOG_UNIMP, "%s: %s: not implemented for %"HWADDR_PRIx"\n",
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TYPE_BCM2838_GPIO, __func__, offset);
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}
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static void bcm2838_gpio_reset(DeviceState *dev)
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{
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BCM2838GpioState *s = BCM2838_GPIO(dev);
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s->lev0 = 0;
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s->lev1 = 0;
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memset(s->fsel, 0, sizeof(s->fsel));
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s->pup_cntrl_reg[0] = RESET_VAL_CNTRL_REG0;
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s->pup_cntrl_reg[1] = RESET_VAL_CNTRL_REG1;
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s->pup_cntrl_reg[2] = RESET_VAL_CNTRL_REG2;
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s->pup_cntrl_reg[3] = RESET_VAL_CNTRL_REG3;
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}
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static const MemoryRegionOps bcm2838_gpio_ops = {
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.read = bcm2838_gpio_read,
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.write = bcm2838_gpio_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static const VMStateDescription vmstate_bcm2838_gpio = {
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.name = "bcm2838_gpio",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_UINT8_ARRAY(fsel, BCM2838GpioState, BCM2838_GPIO_NUM),
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VMSTATE_UINT32(lev0, BCM2838GpioState),
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VMSTATE_UINT32(lev1, BCM2838GpioState),
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VMSTATE_UINT8(sd_fsel, BCM2838GpioState),
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VMSTATE_UINT32_ARRAY(pup_cntrl_reg, BCM2838GpioState,
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GPIO_PUP_PDN_CNTRL_NUM),
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VMSTATE_END_OF_LIST()
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}
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};
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static void bcm2838_gpio_init(Object *obj)
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{
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BCM2838GpioState *s = BCM2838_GPIO(obj);
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DeviceState *dev = DEVICE(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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memory_region_init_io(&s->iomem, obj, &bcm2838_gpio_ops, s,
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"bcm2838_gpio", BCM2838_GPIO_REGS_SIZE);
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sysbus_init_mmio(sbd, &s->iomem);
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qdev_init_gpio_out(dev, s->out, BCM2838_GPIO_NUM);
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}
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static void bcm2838_gpio_realize(DeviceState *dev, Error **errp)
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{
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/* Temporary stub. Do nothing */
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}
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static void bcm2838_gpio_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->vmsd = &vmstate_bcm2838_gpio;
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dc->realize = &bcm2838_gpio_realize;
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dc->reset = &bcm2838_gpio_reset;
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}
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static const TypeInfo bcm2838_gpio_info = {
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.name = TYPE_BCM2838_GPIO,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(BCM2838GpioState),
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.instance_init = bcm2838_gpio_init,
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.class_init = bcm2838_gpio_class_init,
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};
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static void bcm2838_gpio_register_types(void)
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{
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type_register_static(&bcm2838_gpio_info);
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}
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type_init(bcm2838_gpio_register_types)
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@ -9,6 +9,9 @@ system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpio.c'))
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system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_gpio.c'))
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system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_gpio.c'))
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system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gpio.c'))
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system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_gpio.c'))
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system_ss.add(when: 'CONFIG_RASPI', if_true: files(
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'bcm2835_gpio.c',
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'bcm2838_gpio.c'
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))
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system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_gpio.c'))
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system_ss.add(when: 'CONFIG_SIFIVE_GPIO', if_true: files('sifive_gpio.c'))
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@ -0,0 +1,40 @@
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/*
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* Raspberry Pi (BCM2838) GPIO Controller
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* This implementation is based on bcm2835_gpio (hw/gpio/bcm2835_gpio.c)
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*
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* Copyright (c) 2022 Auriga LLC
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*
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* Authors:
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* Lotosh, Aleksey <aleksey.lotosh@auriga.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#ifndef BCM2838_GPIO_H
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#define BCM2838_GPIO_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_BCM2838_GPIO "bcm2838-gpio"
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OBJECT_DECLARE_SIMPLE_TYPE(BCM2838GpioState, BCM2838_GPIO)
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#define BCM2838_GPIO_REGS_SIZE 0x1000
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#define BCM2838_GPIO_NUM 58
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#define GPIO_PUP_PDN_CNTRL_NUM 4
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struct BCM2838GpioState {
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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uint8_t fsel[BCM2838_GPIO_NUM];
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uint32_t lev0, lev1;
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uint8_t sd_fsel;
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qemu_irq out[BCM2838_GPIO_NUM];
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uint32_t pup_cntrl_reg[GPIO_PUP_PDN_CNTRL_NUM];
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};
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#endif
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