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e1000e: Introduce e1000_rx_desc_union 

Before this change, e1000e_write_packet_to_guest() allocated the
receive descriptor buffer as an array of uint8_t. This does not ensure
the buffer is sufficiently aligned.

Introduce e1000_rx_desc_union type, a union type of all receive
descriptor types to correct this.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
This commit is contained in:
Akihiko Odaki 2023-02-23 19:20:00 +09:00 committed by Jason Wang
parent 8a35c648ac
commit 235f2eee82
2 changed files with 57 additions and 59 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
hw/net/e1000_regs.h
View File

@ -1061,7 +1061,6 @@ union e1000_rx_desc_packet_split {
#define E1000_RING_DESC_LEN_SHIFT (4)
#define E1000_MIN_RX_DESC_LEN E1000_RING_DESC_LEN
#define E1000_MAX_RX_DESC_LEN (sizeof(union e1000_rx_desc_packet_split))
/* Receive Descriptor bit definitions */
#define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */

115
hw/net/e1000e_core.c
View File

@ -55,6 +55,12 @@
#define E1000E_MAX_TX_FRAGS (64)
union e1000_rx_desc_union {
struct e1000_rx_desc legacy;
union e1000_rx_desc_extended extended;
union e1000_rx_desc_packet_split packet_split;
};
static inline void
e1000e_set_interrupt_cause(E1000ECore *core, uint32_t val);
@ -1053,29 +1059,28 @@ e1000e_receive_filter(E1000ECore *core, const uint8_t *buf, int size)
}
static inline void
e1000e_read_lgcy_rx_descr(E1000ECore *core, uint8_t *desc, hwaddr *buff_addr)
e1000e_read_lgcy_rx_descr(E1000ECore *core, struct e1000_rx_desc *desc,
hwaddr *buff_addr)
{
struct e1000_rx_desc *d = (struct e1000_rx_desc *) desc;
*buff_addr = le64_to_cpu(d->buffer_addr);
*buff_addr = le64_to_cpu(desc->buffer_addr);
}
static inline void
e1000e_read_ext_rx_descr(E1000ECore *core, uint8_t *desc, hwaddr *buff_addr)
e1000e_read_ext_rx_descr(E1000ECore *core, union e1000_rx_desc_extended *desc,
hwaddr *buff_addr)
{
union e1000_rx_desc_extended *d = (union e1000_rx_desc_extended *) desc;
*buff_addr = le64_to_cpu(d->read.buffer_addr);
*buff_addr = le64_to_cpu(desc->read.buffer_addr);
}
static inline void
e1000e_read_ps_rx_descr(E1000ECore *core, uint8_t *desc,
e1000e_read_ps_rx_descr(E1000ECore *core,
union e1000_rx_desc_packet_split *desc,
hwaddr (*buff_addr)[MAX_PS_BUFFERS])
{
int i;
union e1000_rx_desc_packet_split *d =
(union e1000_rx_desc_packet_split *) desc;
for (i = 0; i < MAX_PS_BUFFERS; i++) {
(*buff_addr)[i] = le64_to_cpu(d->read.buffer_addr[i]);
(*buff_addr)[i] = le64_to_cpu(desc->read.buffer_addr[i]);
}
trace_e1000e_rx_desc_ps_read((*buff_addr)[0], (*buff_addr)[1],
@ -1083,17 +1088,17 @@ e1000e_read_ps_rx_descr(E1000ECore *core, uint8_t *desc,
}
static inline void
e1000e_read_rx_descr(E1000ECore *core, uint8_t *desc,
e1000e_read_rx_descr(E1000ECore *core, union e1000_rx_desc_union *desc,
hwaddr (*buff_addr)[MAX_PS_BUFFERS])
{
if (e1000e_rx_use_legacy_descriptor(core)) {
e1000e_read_lgcy_rx_descr(core, desc, &(*buff_addr)[0]);
e1000e_read_lgcy_rx_descr(core, &desc->legacy, &(*buff_addr)[0]);
(*buff_addr)[1] = (*buff_addr)[2] = (*buff_addr)[3] = 0;
} else {
if (core->mac[RCTL] & E1000_RCTL_DTYP_PS) {
e1000e_read_ps_rx_descr(core, desc, buff_addr);
e1000e_read_ps_rx_descr(core, &desc->packet_split, buff_addr);
} else {
e1000e_read_ext_rx_descr(core, desc, &(*buff_addr)[0]);
e1000e_read_ext_rx_descr(core, &desc->extended, &(*buff_addr)[0]);
(*buff_addr)[1] = (*buff_addr)[2] = (*buff_addr)[3] = 0;
}
}
@ -1264,7 +1269,7 @@ func_exit:
}
static inline void
e1000e_write_lgcy_rx_descr(E1000ECore *core, uint8_t *desc,
e1000e_write_lgcy_rx_descr(E1000ECore *core, struct e1000_rx_desc *desc,
struct NetRxPkt *pkt,
const E1000E_RSSInfo *rss_info,
uint16_t length)
@ -1272,71 +1277,66 @@ e1000e_write_lgcy_rx_descr(E1000ECore *core, uint8_t *desc,
uint32_t status_flags, rss, mrq;
uint16_t ip_id;
struct e1000_rx_desc *d = (struct e1000_rx_desc *) desc;
assert(!rss_info->enabled);
d->length = cpu_to_le16(length);
d->csum = 0;
desc->length = cpu_to_le16(length);
desc->csum = 0;
e1000e_build_rx_metadata(core, pkt, pkt != NULL,
rss_info,
&rss, &mrq,
&status_flags, &ip_id,
&d->special);
d->errors = (uint8_t) (le32_to_cpu(status_flags) >> 24);
d->status = (uint8_t) le32_to_cpu(status_flags);
&desc->special);
desc->errors = (uint8_t) (le32_to_cpu(status_flags) >> 24);
desc->status = (uint8_t) le32_to_cpu(status_flags);
}
static inline void
e1000e_write_ext_rx_descr(E1000ECore *core, uint8_t *desc,
e1000e_write_ext_rx_descr(E1000ECore *core, union e1000_rx_desc_extended *desc,
struct NetRxPkt *pkt,
const E1000E_RSSInfo *rss_info,
uint16_t length)
{
union e1000_rx_desc_extended *d = (union e1000_rx_desc_extended *) desc;
memset(&desc->wb, 0, sizeof(desc->wb));
memset(&d->wb, 0, sizeof(d->wb));
d->wb.upper.length = cpu_to_le16(length);
desc->wb.upper.length = cpu_to_le16(length);
e1000e_build_rx_metadata(core, pkt, pkt != NULL,
rss_info,
&d->wb.lower.hi_dword.rss,
&d->wb.lower.mrq,
&d->wb.upper.status_error,
&d->wb.lower.hi_dword.csum_ip.ip_id,
&d->wb.upper.vlan);
&desc->wb.lower.hi_dword.rss,
&desc->wb.lower.mrq,
&desc->wb.upper.status_error,
&desc->wb.lower.hi_dword.csum_ip.ip_id,
&desc->wb.upper.vlan);
}
static inline void
e1000e_write_ps_rx_descr(E1000ECore *core, uint8_t *desc,
e1000e_write_ps_rx_descr(E1000ECore *core,
union e1000_rx_desc_packet_split *desc,
struct NetRxPkt *pkt,
const E1000E_RSSInfo *rss_info,
size_t ps_hdr_len,
uint16_t(*written)[MAX_PS_BUFFERS])
{
int i;
union e1000_rx_desc_packet_split *d =
(union e1000_rx_desc_packet_split *) desc;
memset(&d->wb, 0, sizeof(d->wb));
memset(&desc->wb, 0, sizeof(desc->wb));
d->wb.middle.length0 = cpu_to_le16((*written)[0]);
desc->wb.middle.length0 = cpu_to_le16((*written)[0]);
for (i = 0; i < PS_PAGE_BUFFERS; i++) {
d->wb.upper.length[i] = cpu_to_le16((*written)[i + 1]);
desc->wb.upper.length[i] = cpu_to_le16((*written)[i + 1]);
}
e1000e_build_rx_metadata(core, pkt, pkt != NULL,
rss_info,
&d->wb.lower.hi_dword.rss,
&d->wb.lower.mrq,
&d->wb.middle.status_error,
&d->wb.lower.hi_dword.csum_ip.ip_id,
&d->wb.middle.vlan);
&desc->wb.lower.hi_dword.rss,
&desc->wb.lower.mrq,
&desc->wb.middle.status_error,
&desc->wb.lower.hi_dword.csum_ip.ip_id,
&desc->wb.middle.vlan);
d->wb.upper.header_status =
desc->wb.upper.header_status =
cpu_to_le16(ps_hdr_len | (ps_hdr_len ? E1000_RXDPS_HDRSTAT_HDRSP : 0));
trace_e1000e_rx_desc_ps_write((*written)[0], (*written)[1],
@ -1344,20 +1344,21 @@ e1000e_write_ps_rx_descr(E1000ECore *core, uint8_t *desc,
}
static inline void
e1000e_write_rx_descr(E1000ECore *core, uint8_t *desc,
e1000e_write_rx_descr(E1000ECore *core, union e1000_rx_desc_union *desc,
struct NetRxPkt *pkt, const E1000E_RSSInfo *rss_info,
size_t ps_hdr_len, uint16_t(*written)[MAX_PS_BUFFERS])
{
if (e1000e_rx_use_legacy_descriptor(core)) {
assert(ps_hdr_len == 0);
e1000e_write_lgcy_rx_descr(core, desc, pkt, rss_info, (*written)[0]);
e1000e_write_lgcy_rx_descr(core, &desc->legacy, pkt, rss_info,
(*written)[0]);
} else {
if (core->mac[RCTL] & E1000_RCTL_DTYP_PS) {
e1000e_write_ps_rx_descr(core, desc, pkt, rss_info,
e1000e_write_ps_rx_descr(core, &desc->packet_split, pkt, rss_info,
ps_hdr_len, written);
} else {
assert(ps_hdr_len == 0);
e1000e_write_ext_rx_descr(core, desc, pkt, rss_info,
e1000e_write_ext_rx_descr(core, &desc->extended, pkt, rss_info,
(*written)[0]);
}
}
@ -1365,12 +1366,12 @@ struct NetRxPkt *pkt, const E1000E_RSSInfo *rss_info,
static inline void
e1000e_pci_dma_write_rx_desc(E1000ECore *core, dma_addr_t addr,
uint8_t *desc, dma_addr_t len)
union e1000_rx_desc_union *desc, dma_addr_t len)
{
PCIDevice *dev = core->owner;
if (e1000e_rx_use_legacy_descriptor(core)) {
struct e1000_rx_desc *d = (struct e1000_rx_desc *) desc;
struct e1000_rx_desc *d = &desc->legacy;
size_t offset = offsetof(struct e1000_rx_desc, status);
uint8_t status = d->status;
@ -1383,8 +1384,7 @@ e1000e_pci_dma_write_rx_desc(E1000ECore *core, dma_addr_t addr,
}
} else {
if (core->mac[RCTL] & E1000_RCTL_DTYP_PS) {
union e1000_rx_desc_packet_split *d =
(union e1000_rx_desc_packet_split *) desc;
union e1000_rx_desc_packet_split *d = &desc->packet_split;
size_t offset = offsetof(union e1000_rx_desc_packet_split,
wb.middle.status_error);
uint32_t status = d->wb.middle.status_error;
@ -1397,8 +1397,7 @@ e1000e_pci_dma_write_rx_desc(E1000ECore *core, dma_addr_t addr,
pci_dma_write(dev, addr + offset, &status, sizeof(status));
}
} else {
union e1000_rx_desc_extended *d =
(union e1000_rx_desc_extended *) desc;
union e1000_rx_desc_extended *d = &desc->extended;
size_t offset = offsetof(union e1000_rx_desc_extended,
wb.upper.status_error);
uint32_t status = d->wb.upper.status_error;
@ -1542,7 +1541,7 @@ e1000e_write_packet_to_guest(E1000ECore *core, struct NetRxPkt *pkt,
{
PCIDevice *d = core->owner;
dma_addr_t base;
uint8_t desc[E1000_MAX_RX_DESC_LEN];
union e1000_rx_desc_union desc;
size_t desc_size;
size_t desc_offset = 0;
size_t iov_ofs = 0;
@ -1578,7 +1577,7 @@ e1000e_write_packet_to_guest(E1000ECore *core, struct NetRxPkt *pkt,
trace_e1000e_rx_descr(rxi->idx, base, core->rx_desc_len);
e1000e_read_rx_descr(core, desc, &ba);
e1000e_read_rx_descr(core, &desc, &ba);
if (ba[0]) {
if (desc_offset < size) {
@ -1648,9 +1647,9 @@ e1000e_write_packet_to_guest(E1000ECore *core, struct NetRxPkt *pkt,
is_last = true;
}
e1000e_write_rx_descr(core, desc, is_last ? core->rx_pkt : NULL,
e1000e_write_rx_descr(core, &desc, is_last ? core->rx_pkt : NULL,
rss_info, do_ps ? ps_hdr_len : 0, &bastate.written);
e1000e_pci_dma_write_rx_desc(core, base, desc, core->rx_desc_len);
e1000e_pci_dma_write_rx_desc(core, base, &desc, core->rx_desc_len);
e1000e_ring_advance(core, rxi,
core->rx_desc_len / E1000_MIN_RX_DESC_LEN);