mirror of https://github.com/xemu-project/xemu.git
tcg/tci: Split out tcg_out_op_rrrrrc
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -369,6 +369,25 @@ static void tcg_out_op_rrrc(TCGContext *s, TCGOpcode op,
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old_code_ptr[1] = s->code_ptr - old_code_ptr;
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old_code_ptr[1] = s->code_ptr - old_code_ptr;
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}
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}
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#if TCG_TARGET_REG_BITS == 32
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static void tcg_out_op_rrrrrc(TCGContext *s, TCGOpcode op,
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TCGReg r0, TCGReg r1, TCGReg r2,
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TCGReg r3, TCGReg r4, TCGCond c5)
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{
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uint8_t *old_code_ptr = s->code_ptr;
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tcg_out_op_t(s, op);
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tcg_out_r(s, r0);
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tcg_out_r(s, r1);
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tcg_out_r(s, r2);
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tcg_out_r(s, r3);
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tcg_out_r(s, r4);
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tcg_out8(s, c5);
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old_code_ptr[1] = s->code_ptr - old_code_ptr;
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}
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#endif
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static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg val, TCGReg base,
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static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg val, TCGReg base,
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intptr_t offset)
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intptr_t offset)
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{
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{
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@ -473,15 +492,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
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#if TCG_TARGET_REG_BITS == 32
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#if TCG_TARGET_REG_BITS == 32
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case INDEX_op_setcond2_i32:
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case INDEX_op_setcond2_i32:
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/* setcond2_i32 cond, t0, t1_low, t1_high, t2_low, t2_high */
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tcg_out_op_rrrrrc(s, opc, args[0], args[1], args[2],
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tcg_out_op_t(s, opc);
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args[3], args[4], args[5]);
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tcg_out_r(s, args[0]);
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tcg_out_r(s, args[1]);
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tcg_out_r(s, args[2]);
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tcg_out_r(s, args[3]);
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tcg_out_r(s, args[4]);
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tcg_out8(s, args[5]); /* condition */
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old_code_ptr[1] = s->code_ptr - old_code_ptr;
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break;
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break;
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#endif
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#endif
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