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target/riscv/cpu.c: remove set_vext_version() 

This setter is doing nothing else but setting env->vext_ver. Assign the
value directly.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230517135714.211809-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2023-05-17 10:57:05 -03:00 committed by Alistair Francis
parent d63be18490
commit 2238c9d196
1 changed files with 1 additions and 6 deletions
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7
target/riscv/cpu.c
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@ -252,11 +252,6 @@ static void set_priv_version(CPURISCVState *env, int priv_ver)
env->priv_ver = priv_ver; env->priv_ver = priv_ver;
} }
static void set_vext_version(CPURISCVState *env, int vext_ver)
{
env->vext_ver = vext_ver;
}
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
static uint8_t satp_mode_from_str(const char *satp_mode_str) static uint8_t satp_mode_from_str(const char *satp_mode_str)
{ {
@ -871,7 +866,7 @@ static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg,
qemu_log("vector version is not specified, " qemu_log("vector version is not specified, "
"use the default value v1.0\n"); "use the default value v1.0\n");
} }
set_vext_version(env, vext_version); env->vext_ver = vext_version;
} }
/* /*