mirror of https://github.com/xemu-project/xemu.git
hw/mpcore.c: Use the GIC memory regions for the CPU interface
Switch to using the GIC memory regions for the CPU interface rather than hand implementing them as a subcase of mpcore_priv_read() and mpcore_priv_write(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
e2c564657c
commit
2206d2a6aa
35
hw/mpcore.c
35
hw/mpcore.c
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@ -41,7 +41,7 @@ static uint64_t mpcore_priv_read(void *opaque, target_phys_addr_t offset,
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{
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mpcore_priv_state *s = (mpcore_priv_state *)opaque;
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int id;
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offset &= 0xfff;
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offset &= 0xff;
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if (offset < 0x100) {
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/* SCU */
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switch (offset) {
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@ -57,17 +57,6 @@ static uint64_t mpcore_priv_read(void *opaque, target_phys_addr_t offset,
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default:
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goto bad_reg;
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}
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} else if (offset < 0x600) {
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/* Interrupt controller. */
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if (offset < 0x200) {
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id = gic_get_current_cpu();
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} else {
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id = (offset - 0x200) >> 8;
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if (id >= s->num_cpu) {
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return 0;
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}
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}
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return gic_cpu_read(&s->gic, id, offset & 0xff);
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}
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bad_reg:
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hw_error("mpcore_priv_read: Bad offset %x\n", (int)offset);
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@ -78,8 +67,7 @@ static void mpcore_priv_write(void *opaque, target_phys_addr_t offset,
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uint64_t value, unsigned size)
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{
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mpcore_priv_state *s = (mpcore_priv_state *)opaque;
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int id;
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offset &= 0xfff;
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offset &= 0xff;
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if (offset < 0x100) {
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/* SCU */
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switch (offset) {
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@ -92,16 +80,6 @@ static void mpcore_priv_write(void *opaque, target_phys_addr_t offset,
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default:
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goto bad_reg;
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}
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} else if (offset < 0x600) {
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/* Interrupt controller. */
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if (offset < 0x200) {
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id = gic_get_current_cpu();
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} else {
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id = (offset - 0x200) >> 8;
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}
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if (id < s->num_cpu) {
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gic_cpu_write(&s->gic, id, offset & 0xff, value);
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}
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}
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return;
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bad_reg:
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@ -129,8 +107,15 @@ static void mpcore_priv_map_setup(mpcore_priv_state *s)
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SysBusDevice *busdev = sysbus_from_qdev(s->mptimer);
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memory_region_init(&s->container, "mpcode-priv-container", 0x2000);
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memory_region_init_io(&s->iomem, &mpcore_priv_ops, s, "mpcode-priv",
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0x1000);
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0x100);
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memory_region_add_subregion(&s->container, 0, &s->iomem);
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/* GIC CPU interfaces: "current CPU" at 0x100, then specific CPUs
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* at 0x200, 0x300...
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*/
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for (i = 0; i < (s->num_cpu + 1); i++) {
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target_phys_addr_t offset = 0x100 + (i * 0x100);
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memory_region_add_subregion(&s->container, offset, &s->gic.cpuiomem[i]);
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}
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/* Add the regions for timer and watchdog for "current CPU" and
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* for each specific CPU.
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*/
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