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target/alpha: Use tcg_constant_i64 for zero and lit 

These constant temps do not need to be freed, and
therefore need less bookkeeping from tcg producers.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2021-07-07 18:50:46 -07:00
parent 3e646c3a3c
commit 212c88c0c7
1 changed files with 2 additions and 14 deletions
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16
target/alpha/translate.c
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@ -66,8 +66,6 @@ struct DisasContext {
/* Temporaries for $31 and $f31 as source and destination. */
TCGv zero;
TCGv sink;
/* Temporary for immediate constants. */
TCGv lit;
};
/* Target-specific return values from translate_one, indicating the
@ -157,7 +155,7 @@ void alpha_translate_init(void)
static TCGv load_zero(DisasContext *ctx)
{
if (!ctx->zero) {
ctx->zero = tcg_const_i64(0);
ctx->zero = tcg_constant_i64(0);
}
return ctx->zero;
}
@ -177,14 +175,6 @@ static void free_context_temps(DisasContext *ctx)
tcg_temp_free(ctx->sink);
ctx->sink = NULL;
}
if (ctx->zero) {
tcg_temp_free(ctx->zero);
ctx->zero = NULL;
}
if (ctx->lit) {
tcg_temp_free(ctx->lit);
ctx->lit = NULL;
}
}
static TCGv load_gpr(DisasContext *ctx, unsigned reg)
@ -200,8 +190,7 @@ static TCGv load_gpr_lit(DisasContext *ctx, unsigned reg,
uint8_t lit, bool islit)
{
if (islit) {
ctx->lit = tcg_const_i64(lit);
return ctx->lit;
return tcg_constant_i64(lit);
} else if (likely(reg < 31)) {
return ctx->ir[reg];
} else {
@ -2992,7 +2981,6 @@ static void alpha_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
ctx->zero = NULL;
ctx->sink = NULL;
ctx->lit = NULL;
/* Bound the number of insns to execute to those left on the page. */
bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4;