diff --git a/hw/xbox/mcpx/nvnet/nvnet.c b/hw/xbox/mcpx/nvnet/nvnet.c
index fef42f0360..90e63294e2 100644
--- a/hw/xbox/mcpx/nvnet/nvnet.c
+++ b/hw/xbox/mcpx/nvnet/nvnet.c
@@ -21,6 +21,7 @@
 #include "qemu/osdep.h"
 #include "trace.h"
 #include "hw/hw.h"
+#include "hw/net/mii.h"
 #include "hw/pci/pci.h"
 #include "hw/pci/pci_device.h"
 #include "hw/qdev-properties.h"
@@ -254,17 +255,17 @@ static int nvnet_mii_rw(NvNetState *s, uint64_t val)
 
     switch (reg) {
     case MII_BMSR:
-        /* Phy initialization code waits for BIT2 to be set.. If not set,
-         * software may report controller as not running */
-        retval = BMSR_ANEGCOMPLETE | BMSR_BIT2;
+        /* Phy initialization code waits for MII_BMSR_LINK_ST to be set.. If not
+           set, software may report controller as not running */
+        retval = MII_BMSR_AN_COMP | MII_BMSR_LINK_ST;
         break;
 
-    case MII_ADVERTISE:
+    case MII_ANAR:
         /* Fall through... */
 
-    case MII_LPA:
-        retval = LPA_10HALF | LPA_10FULL;
-        retval |= LPA_100HALF | LPA_100FULL | LPA_100BASE4;
+    case MII_ANLPAR:
+        retval = MII_ANLPAR_10 | MII_ANLPAR_10FD | MII_ANLPAR_TX |
+                 MII_ANLPAR_TXFD | MII_ANLPAR_T4;
         break;
 
     default:
@@ -882,12 +883,12 @@ static const char *nvnet_get_reg_name(hwaddr addr)
 static const char *nvnet_get_mii_reg_name(uint8_t reg)
 {
     switch (reg) {
-    case MII_PHYSID1:   return "MII_PHYSID1";
-    case MII_PHYSID2:   return "MII_PHYSID2";
+    case MII_PHYID1:    return "MII_PHYID1";
+    case MII_PHYID2:    return "MII_PHYID2";
     case MII_BMCR:      return "MII_BMCR";
     case MII_BMSR:      return "MII_BMSR";
-    case MII_ADVERTISE: return "MII_ADVERTISE";
-    case MII_LPA:       return "MII_LPA";
+    case MII_ANAR:      return "MII_ANAR";
+    case MII_ANLPAR:    return "MII_ANLPAR";
     default:            return "Unknown";
     }
 }
diff --git a/hw/xbox/mcpx/nvnet/nvnet_regs.h b/hw/xbox/mcpx/nvnet/nvnet_regs.h
index 7a1744f7bc..c99f5b2b0a 100644
--- a/hw/xbox/mcpx/nvnet/nvnet_regs.h
+++ b/hw/xbox/mcpx/nvnet/nvnet_regs.h
@@ -271,26 +271,11 @@ enum {
 #define POLL_WAIT             (1 + HZ / 100)
 
 #define MII_READ      (-1)
-#define MII_PHYSID1   0x02    /* PHYS ID 1                   */
-#define MII_PHYSID2   0x03    /* PHYS ID 2                   */
-#define MII_BMCR      0x00    /* Basic mode control register */
-#define MII_BMSR      0x01    /* Basic mode status register  */
-#define MII_ADVERTISE 0x04    /* Advertisement control reg   */
-#define MII_LPA       0x05    /* Link partner ability reg    */
-
-#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete   */
-#define BMSR_BIT2         0x0004 /* Unknown... */
 
 /* Link partner ability register. */
 #define LPA_SLCT     0x001f  /* Same as advertise selector  */
-#define LPA_10HALF   0x0020  /* Can do 10mbps half-duplex   */
-#define LPA_10FULL   0x0040  /* Can do 10mbps full-duplex   */
-#define LPA_100HALF  0x0080  /* Can do 100mbps half-duplex  */
-#define LPA_100FULL  0x0100  /* Can do 100mbps full-duplex  */
-#define LPA_100BASE4 0x0200  /* Can do 100mbps 4k packets   */
 #define LPA_RESV     0x1c00  /* Unused...                   */
 #define LPA_RFAULT   0x2000  /* Link partner faulted        */
-#define LPA_LPACK    0x4000  /* Link partner acked us       */
 #define LPA_NPAGE    0x8000  /* Next page bit               */
 
 // clang-format off