mirror of https://github.com/xemu-project/xemu.git
target-ppc: fix vmx instruction type/type2
A few of the new instructions added inadvertently changed the type of old instruction(PPC_ALTIVEC) to PPC2_ALTIVEC_207 in the dual form declaration. commit:b5d569a1(target-ppc: add vector extract instructions) commit:e7b1e06f(target-ppc: add vector insert instructions) commit: 3aa56a19 (target-ppc: add vector compare not equal instructions) New ISA 3.0 instructions added: vextractub PPC_NONE PPC2_ISA300 vextractuh PPC_NONE PPC2_ISA300 vextractuw PPC_NONE PPC2_ISA300 vinsertb PPC_NONE PPC2_ISA300 vinserth PPC_NONE PPC2_ISA300 vinsertw PPC_NONE PPC2_ISA300 vcmpneb PPC_NONE PPC2_ISA300 vcmpneh PPC_NONE PPC2_ISA300 vcmpnew PPC_NONE PPC2_ISA300 Affected older instructions: vspltb PPC_ALTIVEC PPC_NONE vsplth PPC_ALTIVEC PPC_NONE vspltw PPC_ALTIVEC PPC_NONE vspltisb PPC_ALTIVEC PPC_NONE vspltish PPC_ALTIVEC PPC_NONE vspltisw PPC_ALTIVEC PPC_NONE vcmpequb PPC_ALTIVEC PPC_NONE vcmpequh PPC_ALTIVEC PPC_NONE vcmpequw PPC_ALTIVEC PPC_NONE Change the instruction type/type2 for the older instructions back to what it was(PPC_ALTIVEC). CC: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> Reported-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Nikunj A Dadhania
David Gibson
parent
7f516c9675
commit
2020b67d85
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@ -514,11 +514,11 @@ GEN_VXRFORM(vcmpneb, 3, 0)
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GEN_VXRFORM(vcmpneh, 3, 1)
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GEN_VXRFORM(vcmpnew, 3, 2)
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GEN_VXRFORM_DUAL(vcmpequb, PPC_NONE, PPC2_ALTIVEC_207, \
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GEN_VXRFORM_DUAL(vcmpequb, PPC_ALTIVEC, PPC_NONE, \
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vcmpneb, PPC_NONE, PPC2_ISA300)
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GEN_VXRFORM_DUAL(vcmpequh, PPC_NONE, PPC2_ALTIVEC_207, \
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GEN_VXRFORM_DUAL(vcmpequh, PPC_ALTIVEC, PPC_NONE, \
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vcmpneh, PPC_NONE, PPC2_ISA300)
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GEN_VXRFORM_DUAL(vcmpequw, PPC_NONE, PPC2_ALTIVEC_207, \
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GEN_VXRFORM_DUAL(vcmpequw, PPC_ALTIVEC, PPC_NONE, \
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vcmpnew, PPC_NONE, PPC2_ISA300)
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GEN_VXRFORM_DUAL(vcmpeqfp, PPC_ALTIVEC, PPC_NONE, \
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vcmpequd, PPC_NONE, PPC2_ALTIVEC_207)
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@ -712,18 +712,18 @@ GEN_VXFORM_UIMM_ENV(vcfux, 5, 12);
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GEN_VXFORM_UIMM_ENV(vcfsx, 5, 13);
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GEN_VXFORM_UIMM_ENV(vctuxs, 5, 14);
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GEN_VXFORM_UIMM_ENV(vctsxs, 5, 15);
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GEN_VXFORM_DUAL(vspltb, PPC_NONE, PPC2_ALTIVEC_207,
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vextractub, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vsplth, PPC_NONE, PPC2_ALTIVEC_207,
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vextractuh, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vspltw, PPC_NONE, PPC2_ALTIVEC_207,
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vextractuw, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vspltisb, PPC_NONE, PPC2_ALTIVEC_207,
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vinsertb, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vspltish, PPC_NONE, PPC2_ALTIVEC_207,
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vinserth, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vspltisw, PPC_NONE, PPC2_ALTIVEC_207,
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vinsertw, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vspltb, PPC_ALTIVEC, PPC_NONE,
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vextractub, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vsplth, PPC_ALTIVEC, PPC_NONE,
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vextractuh, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vspltw, PPC_ALTIVEC, PPC_NONE,
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vextractuw, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vspltisb, PPC_ALTIVEC, PPC_NONE,
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vinsertb, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vspltish, PPC_ALTIVEC, PPC_NONE,
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vinserth, PPC_NONE, PPC2_ISA300);
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GEN_VXFORM_DUAL(vspltisw, PPC_ALTIVEC, PPC_NONE,
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vinsertw, PPC_NONE, PPC2_ISA300);
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static void gen_vsldoi(DisasContext *ctx)
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{
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@ -194,26 +194,26 @@ GEN_VXRFORM_DUAL(vcmpeqfp, vcmpequd, 3, 3, PPC_ALTIVEC, PPC_NONE)
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GEN_VXRFORM(vcmpgefp, 3, 7)
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GEN_VXRFORM_DUAL(vcmpgtfp, vcmpgtud, 3, 11, PPC_ALTIVEC, PPC_NONE)
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GEN_VXRFORM_DUAL(vcmpbfp, vcmpgtsd, 3, 15, PPC_ALTIVEC, PPC_NONE)
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GEN_VXRFORM_DUAL(vcmpequb, vcmpneb, 3, 0, PPC_NONE, PPC2_ALTIVEC_207)
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GEN_VXRFORM_DUAL(vcmpequh, vcmpneh, 3, 1, PPC_NONE, PPC2_ALTIVEC_207)
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GEN_VXRFORM_DUAL(vcmpequw, vcmpnew, 3, 2, PPC_NONE, PPC2_ALTIVEC_207)
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GEN_VXRFORM_DUAL(vcmpequb, vcmpneb, 3, 0, PPC_ALTIVEC, PPC_NONE)
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GEN_VXRFORM_DUAL(vcmpequh, vcmpneh, 3, 1, PPC_ALTIVEC, PPC_NONE)
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GEN_VXRFORM_DUAL(vcmpequw, vcmpnew, 3, 2, PPC_ALTIVEC, PPC_NONE)
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#define GEN_VXFORM_DUAL_INV(name0, name1, opc2, opc3, inval0, inval1, type) \
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GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, \
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PPC_NONE)
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GEN_VXFORM_DUAL_INV(vspltb, vextractub, 6, 8, 0x00000000, 0x100000,
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PPC2_ALTIVEC_207),
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PPC_ALTIVEC),
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GEN_VXFORM_DUAL_INV(vsplth, vextractuh, 6, 9, 0x00000000, 0x100000,
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PPC2_ALTIVEC_207),
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PPC_ALTIVEC),
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GEN_VXFORM_DUAL_INV(vspltw, vextractuw, 6, 10, 0x00000000, 0x100000,
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PPC2_ALTIVEC_207),
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PPC_ALTIVEC),
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GEN_VXFORM_300_EXT(vextractd, 6, 11, 0x100000),
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GEN_VXFORM_DUAL_INV(vspltisb, vinsertb, 6, 12, 0x00000000, 0x100000,
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PPC2_ALTIVEC_207),
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PPC_ALTIVEC),
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GEN_VXFORM_DUAL_INV(vspltish, vinserth, 6, 13, 0x00000000, 0x100000,
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PPC2_ALTIVEC_207),
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PPC_ALTIVEC),
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GEN_VXFORM_DUAL_INV(vspltisw, vinsertw, 6, 14, 0x00000000, 0x100000,
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PPC2_ALTIVEC_207),
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PPC_ALTIVEC),
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GEN_VXFORM_300_EXT(vinsertd, 6, 15, 0x100000),
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GEN_VXFORM_300_EO(vctzb, 0x01, 0x18, 0x1C),
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GEN_VXFORM_300_EO(vctzh, 0x01, 0x18, 0x1D),
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