mirror of https://github.com/xemu-project/xemu.git
s390x/tcg: Implement VECTOR FIND ANY ELEMENT EQUAL
Complicated stuff. Provide two different helpers for CC an !CC handling. We might want to add more helpers later. zero_search() and match_index() are courtesy of Richard H. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com>
This commit is contained in:
David Hildenbrand
parent
33556237f6
commit
1fd286385c
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@ -1,7 +1,7 @@
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obj-y += cpu.o cpu_models.o cpu_features.o gdbstub.o interrupt.o helper.o
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obj-$(CONFIG_TCG) += translate.o cc_helper.o excp_helper.o fpu_helper.o
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obj-$(CONFIG_TCG) += int_helper.o mem_helper.o misc_helper.o crypto_helper.o
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obj-$(CONFIG_TCG) += vec_helper.o vec_int_helper.o
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obj-$(CONFIG_TCG) += vec_helper.o vec_int_helper.o vec_string_helper.o
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obj-$(CONFIG_SOFTMMU) += machine.o ioinst.o arch_dump.o mmu_helper.o diag.o
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obj-$(CONFIG_SOFTMMU) += sigp.o
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obj-$(CONFIG_KVM) += kvm.o
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@ -211,6 +211,14 @@ DEF_HELPER_FLAGS_4(gvec_vscbi8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
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DEF_HELPER_FLAGS_4(gvec_vscbi16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
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DEF_HELPER_4(gvec_vtm, void, ptr, cptr, env, i32)
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/* === Vector String Instructions === */
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DEF_HELPER_FLAGS_4(gvec_vfae8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
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DEF_HELPER_FLAGS_4(gvec_vfae16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
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DEF_HELPER_FLAGS_4(gvec_vfae32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
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DEF_HELPER_5(gvec_vfae_cc8, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfae_cc16, void, ptr, cptr, cptr, env, i32)
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DEF_HELPER_5(gvec_vfae_cc32, void, ptr, cptr, cptr, env, i32)
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#ifndef CONFIG_USER_ONLY
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DEF_HELPER_3(servc, i32, env, i64, i64)
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DEF_HELPER_4(diag, void, env, i32, i32, i32)
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@ -1191,6 +1191,11 @@
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/* VECTOR TEST UNDER MASK */
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F(0xe7d8, VTM, VRR_a, V, 0, 0, 0, 0, vtm, 0, IF_VEC)
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/* === Vector String Instructions === */
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/* VECTOR FIND ANY ELEMENT EQUAL */
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F(0xe782, VFAE, VRR_b, V, 0, 0, 0, 0, vfae, 0, IF_VEC)
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#ifndef CONFIG_USER_ONLY
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/* COMPARE AND SWAP AND PURGE */
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E(0xb250, CSP, RRE, Z, r1_32u, ra2, r1_P, 0, csp, 0, MO_TEUL, IF_PRIV)
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@ -2353,3 +2353,33 @@ static DisasJumpType op_vtm(DisasContext *s, DisasOps *o)
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set_cc_static(s);
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return DISAS_NEXT;
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}
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static DisasJumpType op_vfae(DisasContext *s, DisasOps *o)
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{
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const uint8_t es = get_field(s->fields, m4);
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const uint8_t m5 = get_field(s->fields, m5);
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static gen_helper_gvec_3 * const g[3] = {
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gen_helper_gvec_vfae8,
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gen_helper_gvec_vfae16,
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gen_helper_gvec_vfae32,
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};
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static gen_helper_gvec_3_ptr * const g_cc[3] = {
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gen_helper_gvec_vfae_cc8,
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gen_helper_gvec_vfae_cc16,
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gen_helper_gvec_vfae_cc32,
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};
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if (es > ES_32) {
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gen_program_exception(s, PGM_SPECIFICATION);
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return DISAS_NORETURN;
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}
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if (extract32(m5, 0, 1)) {
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gen_gvec_3_ptr(get_field(s->fields, v1), get_field(s->fields, v2),
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get_field(s->fields, v3), cpu_env, m5, g_cc[es]);
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set_cc_static(s);
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} else {
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gen_gvec_3_ool(get_field(s->fields, v1), get_field(s->fields, v2),
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get_field(s->fields, v3), m5, g[es]);
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}
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return DISAS_NEXT;
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}
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@ -0,0 +1,154 @@
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/*
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* QEMU TCG support -- s390x vector string instruction support
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*
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* Copyright (C) 2019 Red Hat Inc
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*
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* Authors:
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* David Hildenbrand <david@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "internal.h"
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#include "vec.h"
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#include "tcg/tcg.h"
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#include "tcg/tcg-gvec-desc.h"
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#include "exec/helper-proto.h"
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/*
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* Returns a bit set in the MSB of each element that is zero,
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* as defined by the mask.
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*/
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static inline uint64_t zero_search(uint64_t a, uint64_t mask)
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{
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return ~(((a & mask) + mask) | a | mask);
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}
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/*
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* Returns the byte offset for the first match, or 16 for no match.
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*/
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static inline int match_index(uint64_t c0, uint64_t c1)
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{
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return (c0 ? clz64(c0) : clz64(c1) + 64) >> 3;
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}
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/*
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* Returns the number of bits composing one element.
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*/
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static uint8_t get_element_bits(uint8_t es)
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{
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return (1 << es) * BITS_PER_BYTE;
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}
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/*
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* Returns the bitmask for a single element.
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*/
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static uint64_t get_single_element_mask(uint8_t es)
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{
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return -1ull >> (64 - get_element_bits(es));
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}
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/*
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* Returns the bitmask for a single element (excluding the MSB).
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*/
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static uint64_t get_single_element_lsbs_mask(uint8_t es)
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{
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return -1ull >> (65 - get_element_bits(es));
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}
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/*
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* Returns the bitmasks for multiple elements (excluding the MSBs).
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*/
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static uint64_t get_element_lsbs_mask(uint8_t es)
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{
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return dup_const(es, get_single_element_lsbs_mask(es));
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}
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static int vfae(void *v1, const void *v2, const void *v3, bool in,
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bool rt, bool zs, uint8_t es)
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{
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const uint64_t mask = get_element_lsbs_mask(es);
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const int bits = get_element_bits(es);
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uint64_t a0, a1, b0, b1, e0, e1, t0, t1, z0, z1;
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uint64_t first_zero = 16;
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uint64_t first_equal;
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int i;
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a0 = s390_vec_read_element64(v2, 0);
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a1 = s390_vec_read_element64(v2, 1);
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b0 = s390_vec_read_element64(v3, 0);
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b1 = s390_vec_read_element64(v3, 1);
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e0 = 0;
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e1 = 0;
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/* compare against equality with every other element */
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for (i = 0; i < 64; i += bits) {
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t0 = rol64(b0, i);
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t1 = rol64(b1, i);
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e0 |= zero_search(a0 ^ t0, mask);
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e0 |= zero_search(a0 ^ t1, mask);
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e1 |= zero_search(a1 ^ t0, mask);
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e1 |= zero_search(a1 ^ t1, mask);
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}
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/* invert the result if requested - invert only the MSBs */
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if (in) {
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e0 = ~e0 & ~mask;
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e1 = ~e1 & ~mask;
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}
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first_equal = match_index(e0, e1);
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if (zs) {
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z0 = zero_search(a0, mask);
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z1 = zero_search(a1, mask);
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first_zero = match_index(z0, z1);
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}
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if (rt) {
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e0 = (e0 >> (bits - 1)) * get_single_element_mask(es);
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e1 = (e1 >> (bits - 1)) * get_single_element_mask(es);
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s390_vec_write_element64(v1, 0, e0);
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s390_vec_write_element64(v1, 1, e1);
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} else {
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s390_vec_write_element64(v1, 0, MIN(first_equal, first_zero));
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s390_vec_write_element64(v1, 1, 0);
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}
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if (first_zero == 16 && first_equal == 16) {
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return 3; /* no match */
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} else if (first_zero == 16) {
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return 1; /* matching elements, no match for zero */
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} else if (first_equal < first_zero) {
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return 2; /* matching elements before match for zero */
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}
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return 0; /* match for zero */
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}
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#define DEF_VFAE_HELPER(BITS) \
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void HELPER(gvec_vfae##BITS)(void *v1, const void *v2, const void *v3, \
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uint32_t desc) \
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{ \
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const bool in = extract32(simd_data(desc), 3, 1); \
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const bool rt = extract32(simd_data(desc), 2, 1); \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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vfae(v1, v2, v3, in, rt, zs, MO_##BITS); \
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}
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DEF_VFAE_HELPER(8)
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DEF_VFAE_HELPER(16)
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DEF_VFAE_HELPER(32)
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#define DEF_VFAE_CC_HELPER(BITS) \
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void HELPER(gvec_vfae_cc##BITS)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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{ \
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const bool in = extract32(simd_data(desc), 3, 1); \
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const bool rt = extract32(simd_data(desc), 2, 1); \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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env->cc_op = vfae(v1, v2, v3, in, rt, zs, MO_##BITS); \
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}
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DEF_VFAE_CC_HELPER(8)
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DEF_VFAE_CC_HELPER(16)
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DEF_VFAE_CC_HELPER(32)
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