mirror of https://github.com/xemu-project/xemu.git
acpi: cpuhp: introduce 'firmware performs eject' status/control bits
Adds bit #4 to status/control field of CPU hotplug MMIO interface. New bit will be used OSPM to mark CPUs as pending for removal by firmware, when it calls _EJ0 method on CPU device node. Later on, when firmware sees this bit set, it will perform CPU eject which will clear bit #4 as well. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20201207140739.3829993-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -56,8 +56,11 @@ read access:
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no device check event to OSPM was issued.
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It's valid only when bit 0 is set.
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2: Device remove event, used to distinguish device for which
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no device eject request to OSPM was issued.
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3-7: reserved and should be ignored by OSPM
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no device eject request to OSPM was issued. Firmware must
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ignore this bit.
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3: reserved and should be ignored by OSPM
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4: if set to 1, OSPM requests firmware to perform device eject.
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5-7: reserved and should be ignored by OSPM
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[0x5-0x7] reserved
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[0x8] Command data: (DWORD access)
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contains 0 unless value last stored in 'Command field' is one of:
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@ -79,10 +82,16 @@ write access:
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selected CPU device
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2: if set to 1 clears device remove event, set by OSPM
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after it has emitted device eject request for the
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selected CPU device
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selected CPU device.
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3: if set to 1 initiates device eject, set by OSPM when it
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triggers CPU device removal and calls _EJ0 method
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4-7: reserved, OSPM must clear them before writing to register
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triggers CPU device removal and calls _EJ0 method or by firmware
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when bit #4 is set. In case bit #4 were set, it's cleared as
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part of device eject.
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4: if set to 1, OSPM hands over device eject to firmware.
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Firmware shall issue device eject request as described above
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(bit #3) and OSPM should not touch device eject bit (#3) in case
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it's asked firmware to perform CPU device eject.
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5-7: reserved, OSPM must clear them before writing to register
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[0x5] Command field: (1 byte access)
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value:
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0: selects a CPU device with inserting/removing events and
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@ -71,6 +71,7 @@ static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
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val |= cdev->cpu ? 1 : 0;
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val |= cdev->is_inserting ? 2 : 0;
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val |= cdev->is_removing ? 4 : 0;
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val |= cdev->fw_remove ? 16 : 0;
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trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
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break;
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case ACPI_CPU_CMD_DATA_OFFSET_RW:
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@ -148,6 +149,14 @@ static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
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hotplug_ctrl = qdev_get_hotplug_handler(dev);
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hotplug_handler_unplug(hotplug_ctrl, dev, NULL);
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object_unparent(OBJECT(dev));
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cdev->fw_remove = false;
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} else if (data & 16) {
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if (!cdev->cpu || cdev->cpu == first_cpu) {
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trace_cpuhp_acpi_fw_remove_invalid_cpu(cpu_st->selector);
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break;
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}
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trace_cpuhp_acpi_fw_remove_cpu(cpu_st->selector);
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cdev->fw_remove = true;
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}
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break;
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case ACPI_CPU_CMD_OFFSET_WR:
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@ -159,7 +168,8 @@ static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
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do {
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cdev = &cpu_st->devs[iter];
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if (cdev->is_inserting || cdev->is_removing) {
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if (cdev->is_inserting || cdev->is_removing ||
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cdev->fw_remove) {
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cpu_st->selector = iter;
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trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
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cdev->is_inserting, cdev->is_removing);
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@ -29,6 +29,8 @@ cpuhp_acpi_clear_inserting_evt(uint32_t idx) "idx[0x%"PRIx32"]"
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cpuhp_acpi_clear_remove_evt(uint32_t idx) "idx[0x%"PRIx32"]"
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cpuhp_acpi_ejecting_invalid_cpu(uint32_t idx) "0x%"PRIx32
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cpuhp_acpi_ejecting_cpu(uint32_t idx) "0x%"PRIx32
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cpuhp_acpi_fw_remove_invalid_cpu(uint32_t idx) "0x%"PRIx32
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cpuhp_acpi_fw_remove_cpu(uint32_t idx) "0x%"PRIx32
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cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "idx[0x%"PRIx32"] OST EVENT: 0x%"PRIx32
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cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "idx[0x%"PRIx32"] OST STATUS: 0x%"PRIx32
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@ -22,6 +22,7 @@ typedef struct AcpiCpuStatus {
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uint64_t arch_id;
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bool is_inserting;
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bool is_removing;
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bool fw_remove;
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uint32_t ost_event;
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uint32_t ost_status;
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} AcpiCpuStatus;
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