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We must reset the PowerPC CPU _after_ registering it, as hardware reset 

effect is implementation dependant.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3323 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer 2007-10-04 01:54:44 +00:00
parent e57448f11c
commit 1cc8e6f067
2 changed files with 5 additions and 3 deletions
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6
hw/ppc405_uc.c
View File

@ -51,20 +51,22 @@ CPUState *ppc405_init (const unsigned char *cpu_model,
/* init CPUs */ /* init CPUs */
env = cpu_init(); env = cpu_init();
qemu_register_reset(&cpu_ppc_reset, env);
register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
ppc_find_by_name(cpu_model, &def); ppc_find_by_name(cpu_model, &def);
if (def == NULL) { if (def == NULL) {
cpu_abort(env, "Unable to find PowerPC %s CPU definition\n", cpu_abort(env, "Unable to find PowerPC %s CPU definition\n",
cpu_model); cpu_model);
} }
cpu_ppc_register(env, def); cpu_ppc_register(env, def);
cpu_ppc_reset(env);
cpu_clk->cb = NULL; /* We don't care about CPU clock frequency changes */ cpu_clk->cb = NULL; /* We don't care about CPU clock frequency changes */
cpu_clk->opaque = env; cpu_clk->opaque = env;
/* Set time-base frequency to sysclk */ /* Set time-base frequency to sysclk */
tb_clk->cb = ppc_emb_timers_init(env, sysclk); tb_clk->cb = ppc_emb_timers_init(env, sysclk);
tb_clk->opaque = env; tb_clk->opaque = env;
ppc_dcr_init(env, NULL, NULL); ppc_dcr_init(env, NULL, NULL);
/* Register Qemu callbacks */
qemu_register_reset(&cpu_ppc_reset, env);
register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
return env; return env;
} }

2
linux-user/main.c
View File

@ -2100,7 +2100,7 @@ int main(int argc, char **argv)
"Unable to find PowerPC CPU definition\n"); "Unable to find PowerPC CPU definition\n");
} }
cpu_ppc_register(env, def); cpu_ppc_register(env, def);
cpu_ppc_reset(env);
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
if (i != 12 && i != 6 && i != 13) if (i != 12 && i != 6 && i != 13)
env->msr[i] = (regs->msr >> i) & 1; env->msr[i] = (regs->msr >> i) & 1;