mirror of https://github.com/xemu-project/xemu.git
hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer
Fix integer handling issues handling issue reported by Coverity: hw/ssi/npcm7xx_fiu.c: 162 in npcm7xx_fiu_flash_read() >>> CID 1432730: Integer handling issues (NEGATIVE_RETURNS) >>> "npcm7xx_fiu_cs_index(fiu, f)" is passed to a parameter that cannot be negative. 162 npcm7xx_fiu_select(fiu, npcm7xx_fiu_cs_index(fiu, f)); hw/ssi/npcm7xx_fiu.c: 221 in npcm7xx_fiu_flash_write() 218 cs_id = npcm7xx_fiu_cs_index(fiu, f); 219 trace_npcm7xx_fiu_flash_write(DEVICE(fiu)->canonical_path, cs_id, addr, 220 size, v); >>> CID 1432729: Integer handling issues (NEGATIVE_RETURNS) >>> "cs_id" is passed to a parameter that cannot be negative. 221 npcm7xx_fiu_select(fiu, cs_id); Since the index of the flash can not be negative, return an unsigned type. Reported-by: Coverity (CID 1432729 & 1432730: NEGATIVE_RETURNS) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200919132435.310527-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -103,7 +103,8 @@ enum NPCM7xxFIURegister {
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* Returns the index of flash in the fiu->flash array. This corresponds to the
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* Returns the index of flash in the fiu->flash array. This corresponds to the
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* chip select ID of the flash.
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* chip select ID of the flash.
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*/
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*/
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static int npcm7xx_fiu_cs_index(NPCM7xxFIUState *fiu, NPCM7xxFIUFlash *flash)
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static unsigned npcm7xx_fiu_cs_index(NPCM7xxFIUState *fiu,
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NPCM7xxFIUFlash *flash)
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{
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{
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int index = flash - fiu->flash;
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int index = flash - fiu->flash;
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@ -113,20 +114,19 @@ static int npcm7xx_fiu_cs_index(NPCM7xxFIUState *fiu, NPCM7xxFIUFlash *flash)
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}
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}
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/* Assert the chip select specified in the UMA Control/Status Register. */
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/* Assert the chip select specified in the UMA Control/Status Register. */
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static void npcm7xx_fiu_select(NPCM7xxFIUState *s, int cs_id)
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static void npcm7xx_fiu_select(NPCM7xxFIUState *s, unsigned cs_id)
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{
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{
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trace_npcm7xx_fiu_select(DEVICE(s)->canonical_path, cs_id);
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trace_npcm7xx_fiu_select(DEVICE(s)->canonical_path, cs_id);
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if (cs_id < s->cs_count) {
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if (cs_id < s->cs_count) {
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qemu_irq_lower(s->cs_lines[cs_id]);
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qemu_irq_lower(s->cs_lines[cs_id]);
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s->active_cs = cs_id;
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} else {
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} else {
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qemu_log_mask(LOG_GUEST_ERROR,
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: UMA to CS%d; this module has only %d chip selects",
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"%s: UMA to CS%d; this module has only %d chip selects",
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DEVICE(s)->canonical_path, cs_id, s->cs_count);
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DEVICE(s)->canonical_path, cs_id, s->cs_count);
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cs_id = -1;
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s->active_cs = -1;
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}
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}
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s->active_cs = cs_id;
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}
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}
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/* Deassert the currently active chip select. */
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/* Deassert the currently active chip select. */
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@ -206,7 +206,7 @@ static void npcm7xx_fiu_flash_write(void *opaque, hwaddr addr, uint64_t v,
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NPCM7xxFIUFlash *f = opaque;
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NPCM7xxFIUFlash *f = opaque;
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NPCM7xxFIUState *fiu = f->fiu;
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NPCM7xxFIUState *fiu = f->fiu;
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uint32_t dwr_cfg;
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uint32_t dwr_cfg;
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int cs_id;
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unsigned cs_id;
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int i;
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int i;
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if (fiu->active_cs != -1) {
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if (fiu->active_cs != -1) {
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@ -19,4 +19,4 @@ npcm7xx_fiu_deselect(const char *id, int cs) "%s deselect CS%d"
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npcm7xx_fiu_ctrl_read(const char *id, uint64_t addr, uint32_t data) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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npcm7xx_fiu_ctrl_read(const char *id, uint64_t addr, uint32_t data) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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npcm7xx_fiu_ctrl_write(const char *id, uint64_t addr, uint32_t data) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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npcm7xx_fiu_ctrl_write(const char *id, uint64_t addr, uint32_t data) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32
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npcm7xx_fiu_flash_read(const char *id, int cs, uint64_t addr, unsigned int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%" PRIx64
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npcm7xx_fiu_flash_read(const char *id, int cs, uint64_t addr, unsigned int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%" PRIx64
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npcm7xx_fiu_flash_write(const char *id, int cs, uint64_t addr, unsigned int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%" PRIx64
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npcm7xx_fiu_flash_write(const char *id, unsigned cs, uint64_t addr, unsigned int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%" PRIx64
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