From 7aca3782d93d96cc5e123617d9e1de783365d4dd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Fri, 22 Nov 2019 14:36:23 +0100 Subject: [PATCH 01/37] hw/display/sm501: Always map the UART0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The SM501 is a Mobile Multimedia Companion Chip with 2 UARTs. This model only implements the first UART. Being part of the chipset, the UART block is always mapped in memory, regardless of whether we provide a chardev backend. Since commit 12051d82f, qemu_chr_fe_init() accepts a NULL chardev. Let's remove the chardev check and always map the UART in the chipset memory. Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20191122133623.13004-1-philmd@redhat.com> Reviewed-by: Peter Maydell --- hw/display/sm501.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 1f33c87e65..79bd7bc2d1 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1958,11 +1958,9 @@ static void sm501_realize_sysbus(DeviceState *dev, Error **errp) sysbus_pass_irq(sbd, SYS_BUS_DEVICE(usb_dev)); /* bridge to serial emulation module */ - if (s->chr_state) { - serial_mm_init(&s->state.mmio_region, SM501_UART0, 2, - NULL, /* TODO : chain irq to IRL */ - 115200, s->chr_state, DEVICE_LITTLE_ENDIAN); - } + serial_mm_init(&s->state.mmio_region, SM501_UART0, 2, + NULL, /* TODO : chain irq to IRL */ + 115200, s->chr_state, DEVICE_LITTLE_ENDIAN); } static Property sm501_sysbus_properties[] = { From 7e83a77f96ee18cb891f309dc617caa5e07ff51e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 19:18:12 +0200 Subject: [PATCH 02/37] sysbus: remove unused sysbus_try_create* MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/core/sysbus.c | 32 -------------------------------- hw/i386/pc.c | 1 - include/hw/sysbus.h | 9 +-------- 3 files changed, 1 insertion(+), 41 deletions(-) diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c index 9e69c83aed..08b0311c5f 100644 --- a/hw/core/sysbus.c +++ b/hw/core/sysbus.c @@ -250,38 +250,6 @@ DeviceState *sysbus_create_varargs(const char *name, return dev; } -DeviceState *sysbus_try_create_varargs(const char *name, - hwaddr addr, ...) -{ - DeviceState *dev; - SysBusDevice *s; - va_list va; - qemu_irq irq; - int n; - - dev = qdev_try_create(NULL, name); - if (!dev) { - return NULL; - } - s = SYS_BUS_DEVICE(dev); - qdev_init_nofail(dev); - if (addr != (hwaddr)-1) { - sysbus_mmio_map(s, 0, addr); - } - va_start(va, addr); - n = 0; - while (1) { - irq = va_arg(va, qemu_irq); - if (!irq) { - break; - } - sysbus_connect_irq(s, n, irq); - n++; - } - va_end(va); - return dev; -} - static void sysbus_dev_print(Monitor *mon, DeviceState *dev, int indent) { SysBusDevice *s = SYS_BUS_DEVICE(dev); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 42014b06de..a4fda69b49 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1198,7 +1198,6 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, * when the HPET wants to take over. Thus we have to disable the latter. */ if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) { - /* In order to set property, here not using sysbus_try_create_simple */ hpet = qdev_try_create(NULL, TYPE_HPET); if (hpet) { /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7 diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index 27e80881da..2eb0484388 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -117,8 +117,7 @@ void foreach_dynamic_sysbus_device(FindSysbusDeviceFunc *func, void *opaque); /* Legacy helper function for creating devices. */ DeviceState *sysbus_create_varargs(const char *name, hwaddr addr, ...); -DeviceState *sysbus_try_create_varargs(const char *name, - hwaddr addr, ...); + static inline DeviceState *sysbus_create_simple(const char *name, hwaddr addr, qemu_irq irq) @@ -126,11 +125,5 @@ static inline DeviceState *sysbus_create_simple(const char *name, return sysbus_create_varargs(name, addr, irq, NULL); } -static inline DeviceState *sysbus_try_create_simple(const char *name, - hwaddr addr, - qemu_irq irq) -{ - return sysbus_try_create_varargs(name, addr, irq, NULL); -} #endif /* HW_SYSBUS_H */ From a35c6ccc06536e076d5a23c51d67458e3546672c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 12:56:31 +0200 Subject: [PATCH 03/37] sysbus: remove outdated comment MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The init callback is no more since commit 817a17fc60f44e29a1944b60d32f45ea127f0cf9 ("core/sysbus: remove the SysBusDeviceClass::init path") Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé --- include/hw/sysbus.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h index 2eb0484388..c4a1c0adfa 100644 --- a/include/hw/sysbus.h +++ b/include/hw/sysbus.h @@ -24,10 +24,6 @@ typedef struct SysBusDevice SysBusDevice; /** * SysBusDeviceClass: - * @init: Callback function invoked when the #DeviceState.realized property - * is changed to %true. Deprecated, new types inheriting directly from - * TYPE_SYS_BUS_DEVICE should use #DeviceClass.realize instead, new leaf - * types should consult their respective parent type. * * SysBusDeviceClass is not overriding #DeviceClass.realize, so derived * classes overriding it are not required to invoke its implementation. From 1e419ee68fa545421e3a6d5ea32d04e9a20dfbf2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Mon, 21 Oct 2019 16:31:31 +0200 Subject: [PATCH 04/37] chardev: generate an internal id when none given MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Internally, qemu may create chardev without ID. Those will not be looked up with qemu_chr_find(), which prevents using qdev_prop_set_chr(). Use id_generate(), to generate an internal name (prefixed with #), so no conflict exist with user-named chardev. Signed-off-by: Marc-André Lureau Reviewed-by: xiaoqiang zhao --- chardev/char.c | 32 ++++++++++++++++++++++++-------- include/qemu/id.h | 1 + util/id.c | 1 + 3 files changed, 26 insertions(+), 8 deletions(-) diff --git a/chardev/char.c b/chardev/char.c index 7b6b2cb123..e7e7492b0e 100644 --- a/chardev/char.c +++ b/chardev/char.c @@ -37,6 +37,7 @@ #include "qemu/help_option.h" #include "qemu/module.h" #include "qemu/option.h" +#include "qemu/id.h" #include "chardev/char-mux.h" @@ -944,10 +945,10 @@ void qemu_chr_set_feature(Chardev *chr, return set_bit(feature, chr->features); } -Chardev *qemu_chardev_new(const char *id, const char *typename, - ChardevBackend *backend, - GMainContext *gcontext, - Error **errp) +static Chardev *chardev_new(const char *id, const char *typename, + ChardevBackend *backend, + GMainContext *gcontext, + Error **errp) { Object *obj; Chardev *chr = NULL; @@ -991,6 +992,21 @@ end: return chr; } +Chardev *qemu_chardev_new(const char *id, const char *typename, + ChardevBackend *backend, + GMainContext *gcontext, + Error **errp) +{ + g_autofree char *genid = NULL; + + if (!id) { + genid = id_generate(ID_CHR); + id = genid; + } + + return chardev_new(id, typename, backend, gcontext, errp); +} + ChardevReturn *qmp_chardev_add(const char *id, ChardevBackend *backend, Error **errp) { @@ -1003,8 +1019,8 @@ ChardevReturn *qmp_chardev_add(const char *id, ChardevBackend *backend, return NULL; } - chr = qemu_chardev_new(id, object_class_get_name(OBJECT_CLASS(cc)), - backend, NULL, errp); + chr = chardev_new(id, object_class_get_name(OBJECT_CLASS(cc)), + backend, NULL, errp); if (!chr) { return NULL; } @@ -1061,8 +1077,8 @@ ChardevReturn *qmp_chardev_change(const char *id, ChardevBackend *backend, return NULL; } - chr_new = qemu_chardev_new(NULL, object_class_get_name(OBJECT_CLASS(cc)), - backend, chr->gcontext, errp); + chr_new = chardev_new(NULL, object_class_get_name(OBJECT_CLASS(cc)), + backend, chr->gcontext, errp); if (!chr_new) { return NULL; } diff --git a/include/qemu/id.h b/include/qemu/id.h index 40c70103e4..b55c406e69 100644 --- a/include/qemu/id.h +++ b/include/qemu/id.h @@ -4,6 +4,7 @@ typedef enum IdSubSystems { ID_QDEV, ID_BLOCK, + ID_CHR, ID_MAX /* last element, used as array size */ } IdSubSystems; diff --git a/util/id.c b/util/id.c index af1c5f1b81..5addb4460e 100644 --- a/util/id.c +++ b/util/id.c @@ -34,6 +34,7 @@ bool id_wellformed(const char *id) static const char *const id_subsys_str[ID_MAX] = { [ID_QDEV] = "qdev", [ID_BLOCK] = "block", + [ID_CHR] = "chr", }; /* From 4305d4825c729222926ef498189e03cdccf125ae Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Mon, 21 Oct 2019 23:31:20 +0200 Subject: [PATCH 05/37] serial-pci-multi: factor out multi_serial_get_port_count() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Common function to be reused in next patch. Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial-pci-multi.c | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 5f13b5663b..5c553c30d0 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -77,33 +77,34 @@ static void multi_serial_irq_mux(void *opaque, int n, int level) pci_set_irq(&pci->dev, pending); } +static size_t multi_serial_get_port_count(PCIDeviceClass *pc) +{ + switch (pc->device_id) { + case 0x0003: + return 2; + case 0x0004: + return 4; + } + + g_assert_not_reached(); +} + + static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) { PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); SerialState *s; Error *err = NULL; - int i, nr_ports = 0; - - switch (pc->device_id) { - case 0x0003: - nr_ports = 2; - break; - case 0x0004: - nr_ports = 4; - break; - } - assert(nr_ports > 0); - assert(nr_ports <= PCI_SERIAL_MAX_PORTS); + size_t i, nports = multi_serial_get_port_count(pc); pci->dev.config[PCI_CLASS_PROG] = pci->prog_if; pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; - memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nr_ports); + memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * nports); pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar); - pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, - nr_ports); + pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, nports); - for (i = 0; i < nr_ports; i++) { + for (i = 0; i < nports; i++) { s = pci->state + i; s->baudbase = 115200; serial_realize_core(s, &err); @@ -113,7 +114,7 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) return; } s->irq = pci->irqs[i]; - pci->name[i] = g_strdup_printf("uart #%d", i + 1); + pci->name[i] = g_strdup_printf("uart #%zu", i + 1); memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, pci->name[i], 8); memory_region_add_subregion(&pci->iobar, 8 * i, &s->io); From 7781b88ee458ff933459503ade0b0a6ddaad08de Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Mon, 21 Oct 2019 23:32:12 +0200 Subject: [PATCH 06/37] serial: initial qom-ification MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make SerialState a device (the following patches will introduce IO/MM sysbus serial devices) None of the serial_{,mm}_init() callers actually free the returned value (even if they did, it would be quite harmless), so we can change the object allocation at will. However, the devices that embed SerialState must now have their field QOM-initialized manually (isa, pci, pci-multi). Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/char/serial-isa.c | 9 +++++++++ hw/char/serial-pci-multi.c | 15 +++++++++++++++ hw/char/serial-pci.c | 13 ++++++++++++- hw/char/serial.c | 34 ++++++++++++++++++++++++++++------ include/hw/char/serial.h | 7 ++++++- 5 files changed, 70 insertions(+), 8 deletions(-) diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 9e31c51bb6..9a5928b3ee 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -111,10 +111,19 @@ static void serial_isa_class_initfn(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } +static void serial_isa_initfn(Object *o) +{ + ISASerialState *self = ISA_SERIAL(o); + + object_initialize_child(o, "serial", &self->state, sizeof(self->state), + TYPE_SERIAL, &error_abort, NULL); +} + static const TypeInfo serial_isa_info = { .name = TYPE_ISA_SERIAL, .parent = TYPE_ISA_DEVICE, .instance_size = sizeof(ISASerialState), + .instance_init = serial_isa_initfn, .class_init = serial_isa_class_initfn, }; diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 5c553c30d0..edfbfdca9e 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -181,10 +181,24 @@ static void multi_4x_serial_pci_class_initfn(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } +static void multi_serial_init(Object *o) +{ + PCIDevice *dev = PCI_DEVICE(o); + PCIMultiSerialState *pms = DO_UPCAST(PCIMultiSerialState, dev, dev); + size_t i, nports = multi_serial_get_port_count(PCI_DEVICE_GET_CLASS(dev)); + + for (i = 0; i < nports; i++) { + object_initialize_child(o, "serial[*]", &pms->state[i], + sizeof(pms->state[i]), + TYPE_SERIAL, &error_abort, NULL); + } +} + static const TypeInfo multi_2x_serial_pci_info = { .name = "pci-serial-2x", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), + .instance_init = multi_serial_init, .class_init = multi_2x_serial_pci_class_initfn, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, @@ -196,6 +210,7 @@ static const TypeInfo multi_4x_serial_pci_info = { .name = "pci-serial-4x", .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCIMultiSerialState), + .instance_init = multi_serial_init, .class_init = multi_4x_serial_pci_class_initfn, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index cb9b76e22b..f99b6c19e0 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -40,6 +40,8 @@ typedef struct PCISerialState { uint8_t prog_if; } PCISerialState; +#define TYPE_PCI_SERIAL "pci-serial" +#define PCI_SERIAL(s) OBJECT_CHECK(PCISerialState, (s), TYPE_PCI_SERIAL) static void serial_pci_realize(PCIDevice *dev, Error **errp) { @@ -103,10 +105,19 @@ static void serial_pci_class_initfn(ObjectClass *klass, void *data) set_bit(DEVICE_CATEGORY_INPUT, dc->categories); } +static void serial_pci_init(Object *o) +{ + PCISerialState *ps = PCI_SERIAL(o); + + object_initialize_child(o, "serial", &ps->state, sizeof(ps->state), + TYPE_SERIAL, &error_abort, NULL); +} + static const TypeInfo serial_pci_info = { - .name = "pci-serial", + .name = TYPE_PCI_SERIAL, .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(PCISerialState), + .instance_init = serial_pci_init, .class_init = serial_pci_class_initfn, .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, diff --git a/hw/char/serial.c b/hw/char/serial.c index b4aa250950..233a9e2076 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -983,9 +983,8 @@ const MemoryRegionOps serial_io_ops = { SerialState *serial_init(int base, qemu_irq irq, int baudbase, Chardev *chr, MemoryRegion *system_io) { - SerialState *s; - - s = g_malloc0(sizeof(SerialState)); + DeviceState *dev = DEVICE(object_new(TYPE_SERIAL)); + SerialState *s = SERIAL(dev); s->irq = irq; s->baudbase = baudbase; @@ -993,6 +992,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, serial_realize_core(s, &error_fatal); vmstate_register(NULL, base, &vmstate_serial, s); + qdev_init_nofail(dev); memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8); memory_region_add_subregion(system_io, base, &s->io); @@ -1000,6 +1000,21 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, return s; } +static void serial_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + /* internal device for serialio/serialmm, not user-creatable */ + dc->user_creatable = false; +} + +static const TypeInfo serial_info = { + .name = TYPE_SERIAL, + .parent = TYPE_DEVICE, + .instance_size = sizeof(SerialState), + .class_init = serial_class_init, +}; + /* Memory mapped interface */ static uint64_t serial_mm_read(void *opaque, hwaddr addr, unsigned size) @@ -1045,9 +1060,8 @@ SerialState *serial_mm_init(MemoryRegion *address_space, qemu_irq irq, int baudbase, Chardev *chr, enum device_endian end) { - SerialState *s; - - s = g_malloc0(sizeof(SerialState)); + DeviceState *dev = DEVICE(object_new(TYPE_SERIAL)); + SerialState *s = SERIAL(dev); s->it_shift = it_shift; s->irq = irq; @@ -1056,9 +1070,17 @@ SerialState *serial_mm_init(MemoryRegion *address_space, serial_realize_core(s, &error_fatal); vmstate_register(NULL, base, &vmstate_serial, s); + qdev_init_nofail(dev); memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], s, "serial", 8 << it_shift); memory_region_add_subregion(address_space, base, &s->io); return s; } + +static void serial_register_types(void) +{ + type_register_static(&serial_info); +} + +type_init(serial_register_types) diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 8be3d8a4f9..180cc7c24e 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -30,10 +30,13 @@ #include "exec/memory.h" #include "qemu/fifo8.h" #include "chardev/char.h" +#include "hw/sysbus.h" #define UART_FIFO_LENGTH 16 /* 16550A Fifo Length */ typedef struct SerialState { + DeviceState parent; + uint16_t divider; uint8_t rbr; /* receive register */ uint8_t thr; /* transmit holding register */ @@ -84,7 +87,9 @@ void serial_realize_core(SerialState *s, Error **errp); void serial_exit_core(SerialState *s); void serial_set_frequency(SerialState *s, uint32_t frequency); -/* legacy pre qom */ +#define TYPE_SERIAL "serial" +#define SERIAL(s) OBJECT_CHECK(SerialState, (s), TYPE_SERIAL) + SerialState *serial_init(int base, qemu_irq irq, int baudbase, Chardev *chr, MemoryRegion *system_io); SerialState *serial_mm_init(MemoryRegion *address_space, From 4cc017e505df7e5344e4dfe7fc17711117c5f11f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 00:32:41 +0200 Subject: [PATCH 07/37] serial: register vmsd with DeviceClass MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Migration from old to new code works, however the other way fails for devices that use serial_init/serial_mm_init with "base", used as instance_id previously. (with qdev_set_legacy_instance_id, the alias_id is only used in savevm.c:find_se(), and thus can only be used to match against "legacy" instance id values. On new code, instance_id is generated incrementally from 0 with calculate_new_instance_id(), based on "qdev-path/vmsd-name") Signed-off-by: Marc-André Lureau Reviewed-by: xiaoqiang zhao --- hw/char/serial.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/char/serial.c b/hw/char/serial.c index 233a9e2076..e926845843 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -990,8 +990,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, s->baudbase = baudbase; qemu_chr_fe_init(&s->chr, chr, &error_abort); serial_realize_core(s, &error_fatal); - - vmstate_register(NULL, base, &vmstate_serial, s); + qdev_set_legacy_instance_id(dev, base, 2); qdev_init_nofail(dev); memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8); @@ -1006,6 +1005,7 @@ static void serial_class_init(ObjectClass *klass, void *data) /* internal device for serialio/serialmm, not user-creatable */ dc->user_creatable = false; + dc->vmsd = &vmstate_serial; } static const TypeInfo serial_info = { @@ -1069,7 +1069,7 @@ SerialState *serial_mm_init(MemoryRegion *address_space, qemu_chr_fe_init(&s->chr, chr, &error_abort); serial_realize_core(s, &error_fatal); - vmstate_register(NULL, base, &vmstate_serial, s); + qdev_set_legacy_instance_id(dev, base, 2); qdev_init_nofail(dev); memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], s, From ff22c588f474c6799015365d25548ab845a4f5cd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 00:32:57 +0200 Subject: [PATCH 08/37] serial: add "chardev" property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is more QOM-friendly, callers may set/get the property themself. Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/char/serial.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/hw/char/serial.c b/hw/char/serial.c index e926845843..1746dbc1c4 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -34,6 +34,7 @@ #include "sysemu/runstate.h" #include "qemu/error-report.h" #include "trace.h" +#include "hw/qdev-properties.h" //#define DEBUG_SERIAL @@ -988,7 +989,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, s->irq = irq; s->baudbase = baudbase; - qemu_chr_fe_init(&s->chr, chr, &error_abort); + qdev_prop_set_chr(dev, "chardev", chr); serial_realize_core(s, &error_fatal); qdev_set_legacy_instance_id(dev, base, 2); qdev_init_nofail(dev); @@ -999,13 +1000,19 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, return s; } -static void serial_class_init(ObjectClass *klass, void *data) +static Property serial_properties[] = { + DEFINE_PROP_CHR("chardev", SerialState, chr), + DEFINE_PROP_END_OF_LIST(), +}; + +static void serial_class_init(ObjectClass *klass, void* data) { DeviceClass *dc = DEVICE_CLASS(klass); /* internal device for serialio/serialmm, not user-creatable */ dc->user_creatable = false; dc->vmsd = &vmstate_serial; + dc->props = serial_properties; } static const TypeInfo serial_info = { @@ -1066,7 +1073,7 @@ SerialState *serial_mm_init(MemoryRegion *address_space, s->it_shift = it_shift; s->irq = irq; s->baudbase = baudbase; - qemu_chr_fe_init(&s->chr, chr, &error_abort); + qdev_prop_set_chr(dev, "chardev", chr); serial_realize_core(s, &error_fatal); qdev_set_legacy_instance_id(dev, base, 2); From 96651db423a0a25466629d35c775531f5145a66a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 00:35:36 +0200 Subject: [PATCH 09/37] serial: add "baudbase" property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell --- hw/char/serial-isa.c | 1 - hw/char/serial-pci-multi.c | 1 - hw/char/serial-pci.c | 1 - hw/char/serial.c | 5 +++-- include/hw/char/serial.h | 2 +- 5 files changed, 4 insertions(+), 6 deletions(-) diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 9a5928b3ee..2a4c8de1bf 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -73,7 +73,6 @@ static void serial_isa_realizefn(DeviceState *dev, Error **errp) } index++; - s->baudbase = 115200; isa_init_irq(isadev, &s->irq, isa->isairq); serial_realize_core(s, errp); qdev_set_legacy_instance_id(dev, isa->iobase, 3); diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index edfbfdca9e..4891f32230 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -106,7 +106,6 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) for (i = 0; i < nports; i++) { s = pci->state + i; - s->baudbase = 115200; serial_realize_core(s, &err); if (err != NULL) { error_propagate(errp, err); diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index f99b6c19e0..db2c17aafd 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -49,7 +49,6 @@ static void serial_pci_realize(PCIDevice *dev, Error **errp) SerialState *s = &pci->state; Error *err = NULL; - s->baudbase = 115200; serial_realize_core(s, &err); if (err != NULL) { error_propagate(errp, err); diff --git a/hw/char/serial.c b/hw/char/serial.c index 1746dbc1c4..a4f0566865 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -988,7 +988,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, SerialState *s = SERIAL(dev); s->irq = irq; - s->baudbase = baudbase; + qdev_prop_set_uint32(dev, "baudbase", baudbase); qdev_prop_set_chr(dev, "chardev", chr); serial_realize_core(s, &error_fatal); qdev_set_legacy_instance_id(dev, base, 2); @@ -1002,6 +1002,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, static Property serial_properties[] = { DEFINE_PROP_CHR("chardev", SerialState, chr), + DEFINE_PROP_UINT32("baudbase", SerialState, baudbase, 115200), DEFINE_PROP_END_OF_LIST(), }; @@ -1072,7 +1073,7 @@ SerialState *serial_mm_init(MemoryRegion *address_space, s->it_shift = it_shift; s->irq = irq; - s->baudbase = baudbase; + qdev_prop_set_uint32(dev, "baudbase", baudbase); qdev_prop_set_chr(dev, "chardev", chr); serial_realize_core(s, &error_fatal); diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 180cc7c24e..3dc618598e 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -58,7 +58,7 @@ typedef struct SerialState { CharBackend chr; int last_break_enable; int it_shift; - int baudbase; + uint32_t baudbase; uint32_t tsr_retry; guint watch_tag; uint32_t wakeup; From c9808d602813bce4fada7bf9ecc463aa779b73f7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 01:02:50 +0200 Subject: [PATCH 10/37] serial: realize the serial device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of calling serial_realize_core(), use the QDev realize callback. Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial-isa.c | 2 +- hw/char/serial-pci-multi.c | 2 +- hw/char/serial-pci.c | 2 +- hw/char/serial.c | 8 ++++---- include/hw/char/serial.h | 1 - 5 files changed, 7 insertions(+), 8 deletions(-) diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c index 2a4c8de1bf..db8644551e 100644 --- a/hw/char/serial-isa.c +++ b/hw/char/serial-isa.c @@ -74,7 +74,7 @@ static void serial_isa_realizefn(DeviceState *dev, Error **errp) index++; isa_init_irq(isadev, &s->irq, isa->isairq); - serial_realize_core(s, errp); + object_property_set_bool(OBJECT(s), true, "realized", errp); qdev_set_legacy_instance_id(dev, isa->iobase, 3); memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8); diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 4891f32230..0e1fdb75d2 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -106,7 +106,7 @@ static void multi_serial_pci_realize(PCIDevice *dev, Error **errp) for (i = 0; i < nports; i++) { s = pci->state + i; - serial_realize_core(s, &err); + object_property_set_bool(OBJECT(s), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); multi_serial_pci_exit(dev); diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index db2c17aafd..4b6a217365 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -49,7 +49,7 @@ static void serial_pci_realize(PCIDevice *dev, Error **errp) SerialState *s = &pci->state; Error *err = NULL; - serial_realize_core(s, &err); + object_property_set_bool(OBJECT(s), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); return; diff --git a/hw/char/serial.c b/hw/char/serial.c index a4f0566865..8328cc62c3 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -934,8 +934,10 @@ static int serial_be_change(void *opaque) return 0; } -void serial_realize_core(SerialState *s, Error **errp) +static void serial_realize(DeviceState *dev, Error **errp) { + SerialState *s = SERIAL(dev); + s->modem_status_poll = timer_new_ns(QEMU_CLOCK_VIRTUAL, (QEMUTimerCB *) serial_update_msl, s); s->fifo_timeout_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, (QEMUTimerCB *) fifo_timeout_int, s); @@ -990,7 +992,6 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, s->irq = irq; qdev_prop_set_uint32(dev, "baudbase", baudbase); qdev_prop_set_chr(dev, "chardev", chr); - serial_realize_core(s, &error_fatal); qdev_set_legacy_instance_id(dev, base, 2); qdev_init_nofail(dev); @@ -1012,6 +1013,7 @@ static void serial_class_init(ObjectClass *klass, void* data) /* internal device for serialio/serialmm, not user-creatable */ dc->user_creatable = false; + dc->realize = serial_realize; dc->vmsd = &vmstate_serial; dc->props = serial_properties; } @@ -1075,8 +1077,6 @@ SerialState *serial_mm_init(MemoryRegion *address_space, s->irq = irq; qdev_prop_set_uint32(dev, "baudbase", baudbase); qdev_prop_set_chr(dev, "chardev", chr); - - serial_realize_core(s, &error_fatal); qdev_set_legacy_instance_id(dev, base, 2); qdev_init_nofail(dev); diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 3dc618598e..571aab97c8 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -83,7 +83,6 @@ typedef struct SerialState { extern const VMStateDescription vmstate_serial; extern const MemoryRegionOps serial_io_ops; -void serial_realize_core(SerialState *s, Error **errp); void serial_exit_core(SerialState *s); void serial_set_frequency(SerialState *s, uint32_t frequency); From b9975000a008c5b0801e3d24ed113a1bd2767ed5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Tue, 22 Oct 2019 01:14:43 +0200 Subject: [PATCH 11/37] serial: replace serial_exit_core() with unrealize MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of calling serial_exit_core() directly, use the QDev unrealize callback. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial-pci-multi.c | 2 +- hw/char/serial-pci.c | 2 +- hw/char/serial.c | 5 ++++- include/hw/char/serial.h | 1 - 4 files changed, 6 insertions(+), 4 deletions(-) diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c index 0e1fdb75d2..e343a1235c 100644 --- a/hw/char/serial-pci-multi.c +++ b/hw/char/serial-pci-multi.c @@ -56,7 +56,7 @@ static void multi_serial_pci_exit(PCIDevice *dev) for (i = 0; i < pci->ports; i++) { s = pci->state + i; - serial_exit_core(s); + object_property_set_bool(OBJECT(s), false, "realized", NULL); memory_region_del_subregion(&pci->iobar, &s->io); g_free(pci->name[i]); } diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c index 4b6a217365..b6a73c65a9 100644 --- a/hw/char/serial-pci.c +++ b/hw/char/serial-pci.c @@ -68,7 +68,7 @@ static void serial_pci_exit(PCIDevice *dev) PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); SerialState *s = &pci->state; - serial_exit_core(s); + object_property_set_bool(OBJECT(s), false, "realized", NULL); qemu_free_irq(s->irq); } diff --git a/hw/char/serial.c b/hw/char/serial.c index 8328cc62c3..ec388f3876 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -950,8 +950,10 @@ static void serial_realize(DeviceState *dev, Error **errp) serial_reset(s); } -void serial_exit_core(SerialState *s) +static void serial_unrealize(DeviceState *dev, Error **errp) { + SerialState *s = SERIAL(dev); + qemu_chr_fe_deinit(&s->chr, false); timer_del(s->modem_status_poll); @@ -1014,6 +1016,7 @@ static void serial_class_init(ObjectClass *klass, void* data) /* internal device for serialio/serialmm, not user-creatable */ dc->user_creatable = false; dc->realize = serial_realize; + dc->unrealize = serial_unrealize; dc->vmsd = &vmstate_serial; dc->props = serial_properties; } diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 571aab97c8..548944b06a 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -83,7 +83,6 @@ typedef struct SerialState { extern const VMStateDescription vmstate_serial; extern const MemoryRegionOps serial_io_ops; -void serial_exit_core(SerialState *s); void serial_set_frequency(SerialState *s, uint32_t frequency); #define TYPE_SERIAL "serial" From 490a9d9b36bfa22a6b46b27e6e9e84e1bac44c68 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 17:50:06 +0200 Subject: [PATCH 12/37] serial: start making SerialMM a sysbus device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Memory mapped serial device is in fact a sysbus device. The following patches will make use of sysbus facilities for resource and registration. In particular, "serial-mm: use sysbus facilities" will move internal serial realization to serial_mm_realize callback to follow qdev best practices. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/char/omap_uart.c | 2 +- hw/char/serial.c | 72 ++++++++++++++++++++++++++++++---------- hw/mips/boston.c | 2 +- hw/mips/mips_malta.c | 2 +- include/hw/char/serial.h | 20 ++++++++--- 5 files changed, 73 insertions(+), 25 deletions(-) diff --git a/hw/char/omap_uart.c b/hw/char/omap_uart.c index 13e4f43c4c..e8da933378 100644 --- a/hw/char/omap_uart.c +++ b/hw/char/omap_uart.c @@ -27,7 +27,7 @@ struct omap_uart_s { MemoryRegion iomem; hwaddr base; - SerialState *serial; /* TODO */ + SerialMM *serial; /* TODO */ struct omap_target_agent_s *ta; omap_clk fclk; qemu_irq irq; diff --git a/hw/char/serial.c b/hw/char/serial.c index ec388f3876..824390817c 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1032,16 +1032,28 @@ static const TypeInfo serial_info = { static uint64_t serial_mm_read(void *opaque, hwaddr addr, unsigned size) { - SerialState *s = opaque; - return serial_ioport_read(s, addr >> s->it_shift, 1); + SerialMM *s = SERIAL_MM(opaque); + return serial_ioport_read(&s->serial, addr >> s->it_shift, 1); } static void serial_mm_write(void *opaque, hwaddr addr, uint64_t value, unsigned size) { - SerialState *s = opaque; + SerialMM *s = SERIAL_MM(opaque); value &= 255; - serial_ioport_write(s, addr >> s->it_shift, value, 1); + serial_ioport_write(&s->serial, addr >> s->it_shift, value, 1); +} + +static void serial_mm_realize(DeviceState *dev, Error **errp) +{ + SerialMM *s = SERIAL_MM(dev); + Error *local_err = NULL; + + object_property_set_bool(OBJECT(&s->serial), true, "realized", &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } } static const MemoryRegionOps serial_mm_ops[3] = { @@ -1068,30 +1080,56 @@ static const MemoryRegionOps serial_mm_ops[3] = { }, }; -SerialState *serial_mm_init(MemoryRegion *address_space, - hwaddr base, int it_shift, - qemu_irq irq, int baudbase, - Chardev *chr, enum device_endian end) +SerialMM *serial_mm_init(MemoryRegion *address_space, + hwaddr base, int it_shift, + qemu_irq irq, int baudbase, + Chardev *chr, enum device_endian end) { - DeviceState *dev = DEVICE(object_new(TYPE_SERIAL)); - SerialState *s = SERIAL(dev); + SerialMM *smm = SERIAL_MM(qdev_create(NULL, TYPE_SERIAL_MM)); + SerialState *s = &smm->serial; - s->it_shift = it_shift; + smm->it_shift = it_shift; s->irq = irq; - qdev_prop_set_uint32(dev, "baudbase", baudbase); - qdev_prop_set_chr(dev, "chardev", chr); - qdev_set_legacy_instance_id(dev, base, 2); - qdev_init_nofail(dev); + qdev_prop_set_uint32(DEVICE(s), "baudbase", baudbase); + qdev_prop_set_chr(DEVICE(s), "chardev", chr); + qdev_set_legacy_instance_id(DEVICE(s), base, 2); - memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], s, + qdev_init_nofail(DEVICE(smm)); + + memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], smm, "serial", 8 << it_shift); memory_region_add_subregion(address_space, base, &s->io); - return s; + + return smm; } +static void serial_mm_instance_init(Object *o) +{ + SerialMM *smm = SERIAL_MM(o); + + object_initialize_child(o, "serial", &smm->serial, sizeof(smm->serial), + TYPE_SERIAL, &error_abort, NULL); +} + +static void serial_mm_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(oc); + + dc->realize = serial_mm_realize; +} + +static const TypeInfo serial_mm_info = { + .name = TYPE_SERIAL_MM, + .parent = TYPE_SYS_BUS_DEVICE, + .class_init = serial_mm_class_init, + .instance_init = serial_mm_instance_init, + .instance_size = sizeof(SerialMM), +}; + static void serial_register_types(void) { type_register_static(&serial_info); + type_register_static(&serial_mm_info); } type_init(serial_register_types) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index ca7d813a52..23fdd5ec6a 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -50,7 +50,7 @@ typedef struct { MachineState *mach; MIPSCPSState cps; - SerialState *uart; + SerialMM *uart; CharBackend lcd_display; char lcd_content[8]; diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 783cd99848..ea92e5e27d 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -83,7 +83,7 @@ typedef struct { uint32_t i2csel; CharBackend display; char display_text[9]; - SerialState *uart; + SerialMM *uart; bool display_inited; } MaltaFPGAState; diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 548944b06a..730165347c 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -57,7 +57,6 @@ typedef struct SerialState { qemu_irq irq; CharBackend chr; int last_break_enable; - int it_shift; uint32_t baudbase; uint32_t tsr_retry; guint watch_tag; @@ -80,6 +79,14 @@ typedef struct SerialState { MemoryRegion io; } SerialState; +typedef struct SerialMM { + SysBusDevice parent; + + SerialState serial; + + int it_shift; +} SerialMM; + extern const VMStateDescription vmstate_serial; extern const MemoryRegionOps serial_io_ops; @@ -88,12 +95,15 @@ void serial_set_frequency(SerialState *s, uint32_t frequency); #define TYPE_SERIAL "serial" #define SERIAL(s) OBJECT_CHECK(SerialState, (s), TYPE_SERIAL) +#define TYPE_SERIAL_MM "serial-mm" +#define SERIAL_MM(s) OBJECT_CHECK(SerialMM, (s), TYPE_SERIAL_MM) + SerialState *serial_init(int base, qemu_irq irq, int baudbase, Chardev *chr, MemoryRegion *system_io); -SerialState *serial_mm_init(MemoryRegion *address_space, - hwaddr base, int it_shift, - qemu_irq irq, int baudbase, - Chardev *chr, enum device_endian end); +SerialMM *serial_mm_init(MemoryRegion *address_space, + hwaddr base, int it_shift, + qemu_irq irq, int baudbase, + Chardev *chr, enum device_endian end); /* serial-isa.c */ From 17fd1a6490b1d66cdfa60c67060e63da71a43a51 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Mon, 21 Oct 2019 20:14:02 +0200 Subject: [PATCH 13/37] serial-mm: add "regshift" property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit And a property and rename "it_shift" field to "regshift", as it seems to be more popular (and I don't know what "it" stands for). Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/char/serial.c | 22 +++++++++++++++++----- include/hw/char/serial.h | 4 ++-- 2 files changed, 19 insertions(+), 7 deletions(-) diff --git a/hw/char/serial.c b/hw/char/serial.c index 824390817c..f11f2cdbf3 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1033,7 +1033,7 @@ static uint64_t serial_mm_read(void *opaque, hwaddr addr, unsigned size) { SerialMM *s = SERIAL_MM(opaque); - return serial_ioport_read(&s->serial, addr >> s->it_shift, 1); + return serial_ioport_read(&s->serial, addr >> s->regshift, 1); } static void serial_mm_write(void *opaque, hwaddr addr, @@ -1041,7 +1041,7 @@ static void serial_mm_write(void *opaque, hwaddr addr, { SerialMM *s = SERIAL_MM(opaque); value &= 255; - serial_ioport_write(&s->serial, addr >> s->it_shift, value, 1); + serial_ioport_write(&s->serial, addr >> s->regshift, value, 1); } static void serial_mm_realize(DeviceState *dev, Error **errp) @@ -1081,14 +1081,14 @@ static const MemoryRegionOps serial_mm_ops[3] = { }; SerialMM *serial_mm_init(MemoryRegion *address_space, - hwaddr base, int it_shift, + hwaddr base, int regshift, qemu_irq irq, int baudbase, Chardev *chr, enum device_endian end) { SerialMM *smm = SERIAL_MM(qdev_create(NULL, TYPE_SERIAL_MM)); SerialState *s = &smm->serial; - smm->it_shift = it_shift; + qdev_prop_set_uint8(DEVICE(smm), "regshift", regshift); s->irq = irq; qdev_prop_set_uint32(DEVICE(s), "baudbase", baudbase); qdev_prop_set_chr(DEVICE(s), "chardev", chr); @@ -1097,7 +1097,7 @@ SerialMM *serial_mm_init(MemoryRegion *address_space, qdev_init_nofail(DEVICE(smm)); memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], smm, - "serial", 8 << it_shift); + "serial", 8 << regshift); memory_region_add_subregion(address_space, base, &s->io); return smm; @@ -1111,10 +1111,21 @@ static void serial_mm_instance_init(Object *o) TYPE_SERIAL, &error_abort, NULL); } +static Property serial_mm_properties[] = { + /* + * Set the spacing between adjacent memory-mapped UART registers. + * Each register will be at (1 << regshift) bytes after the + * previous one. + */ + DEFINE_PROP_UINT8("regshift", SerialMM, regshift, 0), + DEFINE_PROP_END_OF_LIST(), +}; + static void serial_mm_class_init(ObjectClass *oc, void *data) { DeviceClass *dc = DEVICE_CLASS(oc); + dc->props = serial_mm_properties; dc->realize = serial_mm_realize; } @@ -1124,6 +1135,7 @@ static const TypeInfo serial_mm_info = { .class_init = serial_mm_class_init, .instance_init = serial_mm_instance_init, .instance_size = sizeof(SerialMM), + .class_init = serial_mm_class_init, }; static void serial_register_types(void) diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index 730165347c..eaeda62698 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -84,7 +84,7 @@ typedef struct SerialMM { SerialState serial; - int it_shift; + uint8_t regshift; } SerialMM; extern const VMStateDescription vmstate_serial; @@ -101,7 +101,7 @@ void serial_set_frequency(SerialState *s, uint32_t frequency); SerialState *serial_init(int base, qemu_irq irq, int baudbase, Chardev *chr, MemoryRegion *system_io); SerialMM *serial_mm_init(MemoryRegion *address_space, - hwaddr base, int it_shift, + hwaddr base, int regshift, qemu_irq irq, int baudbase, Chardev *chr, enum device_endian end); From 80b2eed95dd6397541cc4d7ec36db0e182a8f402 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 18:07:03 +0200 Subject: [PATCH 14/37] serial-mm: add endianness property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a qdev property for endianness, so memory region setup can be done in realize. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial.c | 2 ++ include/hw/char/serial.h | 1 + 2 files changed, 3 insertions(+) diff --git a/hw/char/serial.c b/hw/char/serial.c index f11f2cdbf3..1d350a851b 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1093,6 +1093,7 @@ SerialMM *serial_mm_init(MemoryRegion *address_space, qdev_prop_set_uint32(DEVICE(s), "baudbase", baudbase); qdev_prop_set_chr(DEVICE(s), "chardev", chr); qdev_set_legacy_instance_id(DEVICE(s), base, 2); + qdev_prop_set_uint8(DEVICE(self), "endianness", end); qdev_init_nofail(DEVICE(smm)); @@ -1118,6 +1119,7 @@ static Property serial_mm_properties[] = { * previous one. */ DEFINE_PROP_UINT8("regshift", SerialMM, regshift, 0), + DEFINE_PROP_UINT8("endianness", SerialMM, endianness, DEVICE_NATIVE_ENDIAN), DEFINE_PROP_END_OF_LIST(), }; diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index eaeda62698..d586924937 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -85,6 +85,7 @@ typedef struct SerialMM { SerialState serial; uint8_t regshift; + uint8_t endianness; } SerialMM; extern const VMStateDescription vmstate_serial; From 9bc7176c8c30760d2dc0e5b560a6c14f5f9aa08d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 12:28:15 +0400 Subject: [PATCH 15/37] serial-mm: use sysbus facilities MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make SerialMM a regular sysbus device, by registering the irq, and the mmio region. Reexport the internal serial properties. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/char/serial.c | 50 +++++++++++++++++++++++++++--------------------- 1 file changed, 28 insertions(+), 22 deletions(-) diff --git a/hw/char/serial.c b/hw/char/serial.c index 1d350a851b..b3927c7198 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1044,18 +1044,6 @@ static void serial_mm_write(void *opaque, hwaddr addr, serial_ioport_write(&s->serial, addr >> s->regshift, value, 1); } -static void serial_mm_realize(DeviceState *dev, Error **errp) -{ - SerialMM *s = SERIAL_MM(dev); - Error *local_err = NULL; - - object_property_set_bool(OBJECT(&s->serial), true, "realized", &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } -} - static const MemoryRegionOps serial_mm_ops[3] = { [DEVICE_NATIVE_ENDIAN] = { .read = serial_mm_read, @@ -1080,26 +1068,42 @@ static const MemoryRegionOps serial_mm_ops[3] = { }, }; +static void serial_mm_realize(DeviceState *dev, Error **errp) +{ + SerialMM *smm = SERIAL_MM(dev); + SerialState *s = &smm->serial; + Error *local_err = NULL; + + object_property_set_bool(OBJECT(s), true, "realized", &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + memory_region_init_io(&s->io, NULL, &serial_mm_ops[smm->endianness], smm, + "serial", 8 << smm->regshift); + sysbus_init_mmio(SYS_BUS_DEVICE(smm), &s->io); + sysbus_init_irq(SYS_BUS_DEVICE(smm), &smm->serial.irq); +} + SerialMM *serial_mm_init(MemoryRegion *address_space, hwaddr base, int regshift, qemu_irq irq, int baudbase, Chardev *chr, enum device_endian end) { SerialMM *smm = SERIAL_MM(qdev_create(NULL, TYPE_SERIAL_MM)); - SerialState *s = &smm->serial; + MemoryRegion *mr; qdev_prop_set_uint8(DEVICE(smm), "regshift", regshift); - s->irq = irq; - qdev_prop_set_uint32(DEVICE(s), "baudbase", baudbase); - qdev_prop_set_chr(DEVICE(s), "chardev", chr); - qdev_set_legacy_instance_id(DEVICE(s), base, 2); - qdev_prop_set_uint8(DEVICE(self), "endianness", end); - + qdev_prop_set_uint32(DEVICE(smm), "baudbase", baudbase); + qdev_prop_set_chr(DEVICE(smm), "chardev", chr); + qdev_set_legacy_instance_id(DEVICE(smm), base, 2); + qdev_prop_set_uint8(DEVICE(smm), "endianness", end); qdev_init_nofail(DEVICE(smm)); - memory_region_init_io(&s->io, NULL, &serial_mm_ops[end], smm, - "serial", 8 << regshift); - memory_region_add_subregion(address_space, base, &s->io); + sysbus_connect_irq(SYS_BUS_DEVICE(smm), 0, irq); + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(smm), 0); + memory_region_add_subregion(address_space, base, mr); return smm; } @@ -1110,6 +1114,8 @@ static void serial_mm_instance_init(Object *o) object_initialize_child(o, "serial", &smm->serial, sizeof(smm->serial), TYPE_SERIAL, &error_abort, NULL); + + qdev_alias_all_properties(DEVICE(&smm->serial), o); } static Property serial_mm_properties[] = { From 10315a70896fb82000cc4b2a1198b70c775c7a59 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 18:37:33 +0200 Subject: [PATCH 16/37] serial: make SerialIO a sysbus device MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make serial IO a proper sysbus device, similar to serial MM. Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial.c | 64 +++++++++++++++++++++++++++++++++------- include/hw/char/serial.h | 13 ++++++-- 2 files changed, 64 insertions(+), 13 deletions(-) diff --git a/hw/char/serial.c b/hw/char/serial.c index b3927c7198..3bcb7a6268 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -985,22 +985,63 @@ const MemoryRegionOps serial_io_ops = { .endianness = DEVICE_LITTLE_ENDIAN, }; -SerialState *serial_init(int base, qemu_irq irq, int baudbase, - Chardev *chr, MemoryRegion *system_io) +static void serial_io_realize(DeviceState *dev, Error **errp) { - DeviceState *dev = DEVICE(object_new(TYPE_SERIAL)); - SerialState *s = SERIAL(dev); + SerialIO *sio = SERIAL_IO(dev); + SerialState *s = &sio->serial; + Error *local_err = NULL; - s->irq = irq; - qdev_prop_set_uint32(dev, "baudbase", baudbase); - qdev_prop_set_chr(dev, "chardev", chr); - qdev_set_legacy_instance_id(dev, base, 2); - qdev_init_nofail(dev); + object_property_set_bool(OBJECT(s), true, "realized", &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8); - memory_region_add_subregion(system_io, base, &s->io); + sysbus_init_irq(SYS_BUS_DEVICE(sio), &s->irq); +} - return s; +static void serial_io_class_init(ObjectClass *klass, void* data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->realize = serial_io_realize; + /* No dc->vmsd: class has no migratable state */ +} + +static void serial_io_instance_init(Object *o) +{ + SerialIO *sio = SERIAL_IO(o); + + object_initialize_child(o, "serial", &sio->serial, sizeof(sio->serial), + TYPE_SERIAL, &error_abort, NULL); + + qdev_alias_all_properties(DEVICE(&sio->serial), o); +} + + +static const TypeInfo serial_io_info = { + .name = TYPE_SERIAL_IO, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(SerialIO), + .instance_init = serial_io_instance_init, + .class_init = serial_io_class_init, +}; + +SerialIO *serial_init(int base, qemu_irq irq, int baudbase, + Chardev *chr, MemoryRegion *system_io) +{ + SerialIO *sio = SERIAL_IO(qdev_create(NULL, TYPE_SERIAL_IO)); + + qdev_prop_set_uint32(DEVICE(sio), "baudbase", baudbase); + qdev_prop_set_chr(DEVICE(sio), "chardev", chr); + qdev_set_legacy_instance_id(DEVICE(sio), base, 2); + qdev_init_nofail(DEVICE(sio)); + + sysbus_connect_irq(SYS_BUS_DEVICE(sio), 0, irq); + memory_region_add_subregion(system_io, base, &sio->serial.io); + + return sio; } static Property serial_properties[] = { @@ -1149,6 +1190,7 @@ static const TypeInfo serial_mm_info = { static void serial_register_types(void) { type_register_static(&serial_info); + type_register_static(&serial_io_info); type_register_static(&serial_mm_info); } diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index d586924937..d356ba838c 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -88,6 +88,12 @@ typedef struct SerialMM { uint8_t endianness; } SerialMM; +typedef struct SerialIO { + SysBusDevice parent; + + SerialState serial; +} SerialIO; + extern const VMStateDescription vmstate_serial; extern const MemoryRegionOps serial_io_ops; @@ -99,8 +105,11 @@ void serial_set_frequency(SerialState *s, uint32_t frequency); #define TYPE_SERIAL_MM "serial-mm" #define SERIAL_MM(s) OBJECT_CHECK(SerialMM, (s), TYPE_SERIAL_MM) -SerialState *serial_init(int base, qemu_irq irq, int baudbase, - Chardev *chr, MemoryRegion *system_io); +#define TYPE_SERIAL_IO "serial-io" +#define SERIAL_IO(s) OBJECT_CHECK(SerialIO, (s), TYPE_SERIAL_IO) + +SerialIO *serial_init(int base, qemu_irq irq, int baudbase, + Chardev *chr, MemoryRegion *system_io); SerialMM *serial_mm_init(MemoryRegion *address_space, hwaddr base, int regshift, qemu_irq irq, int baudbase, From 9fac5d88ee1a81dca643a62bfce5a2364b437bfa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 15:29:55 +0200 Subject: [PATCH 17/37] mips: inline serial_init() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The function is specific to mipssim, let's inline it. (when inlining, we use a DeviceState variable instead of SerialIO, as it is the most common type used, and avoids having too many casts) Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Aleksandar Markovic --- hw/char/serial.c | 16 ---------------- hw/mips/mips_mipssim.c | 15 ++++++++++++--- include/hw/char/serial.h | 2 -- 3 files changed, 12 insertions(+), 21 deletions(-) diff --git a/hw/char/serial.c b/hw/char/serial.c index 3bcb7a6268..7746dfcee8 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -1028,22 +1028,6 @@ static const TypeInfo serial_io_info = { .class_init = serial_io_class_init, }; -SerialIO *serial_init(int base, qemu_irq irq, int baudbase, - Chardev *chr, MemoryRegion *system_io) -{ - SerialIO *sio = SERIAL_IO(qdev_create(NULL, TYPE_SERIAL_IO)); - - qdev_prop_set_uint32(DEVICE(sio), "baudbase", baudbase); - qdev_prop_set_chr(DEVICE(sio), "chardev", chr); - qdev_set_legacy_instance_id(DEVICE(sio), base, 2); - qdev_init_nofail(DEVICE(sio)); - - sysbus_connect_irq(SYS_BUS_DEVICE(sio), 0, irq); - memory_region_add_subregion(system_io, base, &sio->serial.io); - - return sio; -} - static Property serial_properties[] = { DEFINE_PROP_CHR("chardev", SerialState, chr), DEFINE_PROP_UINT32("baudbase", SerialState, baudbase, 115200), diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 282bbecb24..5ee26108f5 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -40,6 +40,7 @@ #include "hw/loader.h" #include "elf.h" #include "hw/sysbus.h" +#include "hw/qdev-properties.h" #include "exec/address-spaces.h" #include "qemu/error-report.h" #include "sysemu/qtest.h" @@ -219,9 +220,17 @@ mips_mipssim_init(MachineState *machine) * A single 16450 sits at offset 0x3f8. It is attached to * MIPS CPU INT2, which is interrupt 4. */ - if (serial_hd(0)) - serial_init(0x3f8, env->irq[4], 115200, serial_hd(0), - get_system_io()); + if (serial_hd(0)) { + DeviceState *dev = qdev_create(NULL, TYPE_SERIAL_IO); + + qdev_prop_set_uint32(dev, "baudbase", 115200); + qdev_prop_set_chr(dev, "chardev", serial_hd(0)); + qdev_set_legacy_instance_id(dev, 0x3f8, 2); + qdev_init_nofail(dev); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); + memory_region_add_subregion(get_system_io(), 0x3f8, + &SERIAL_IO(dev)->serial.io); + } if (nd_table[0].used) /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */ diff --git a/include/hw/char/serial.h b/include/hw/char/serial.h index d356ba838c..535fa23a2b 100644 --- a/include/hw/char/serial.h +++ b/include/hw/char/serial.h @@ -108,8 +108,6 @@ void serial_set_frequency(SerialState *s, uint32_t frequency); #define TYPE_SERIAL_IO "serial-io" #define SERIAL_IO(s) OBJECT_CHECK(SerialIO, (s), TYPE_SERIAL_IO) -SerialIO *serial_init(int base, qemu_irq irq, int baudbase, - Chardev *chr, MemoryRegion *system_io); SerialMM *serial_mm_init(MemoryRegion *address_space, hwaddr base, int regshift, qemu_irq irq, int baudbase, From f90f2cf7ae77bd85a8439b0abcc05d88c8cc0cb7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 15:20:22 +0400 Subject: [PATCH 18/37] mips: baudbase is 115200 by default MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit (The default value is set for TYPE_SERIAL in serial_properties) Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Aleksandar Markovic --- hw/mips/mips_mipssim.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 5ee26108f5..3cd0e6eb33 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -223,7 +223,6 @@ mips_mipssim_init(MachineState *machine) if (serial_hd(0)) { DeviceState *dev = qdev_create(NULL, TYPE_SERIAL_IO); - qdev_prop_set_uint32(dev, "baudbase", 115200); qdev_prop_set_chr(dev, "chardev", serial_hd(0)); qdev_set_legacy_instance_id(dev, 0x3f8, 2); qdev_init_nofail(dev); From 4f1733d4c0cdc01f6425683df7dffbc69351a323 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 13:41:10 +0400 Subject: [PATCH 19/37] mips: use sysbus_add_io() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit sysbus devices should use the associated helper function instead of calling memory_region_add_subregion() manually. This simplifies slightly the code. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daudé --- hw/mips/mips_mipssim.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 3cd0e6eb33..2c2c7f25b2 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -227,8 +227,7 @@ mips_mipssim_init(MachineState *machine) qdev_set_legacy_instance_id(dev, 0x3f8, 2); qdev_init_nofail(dev); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); - memory_region_add_subregion(get_system_io(), 0x3f8, - &SERIAL_IO(dev)->serial.io); + sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, &SERIAL_IO(dev)->serial.io); } if (nd_table[0].used) From d9259178fe51a0a550fe50561eb0c346ad4518a4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 15:16:29 +0400 Subject: [PATCH 20/37] mips: use sysbus_mmio_get_region() instead of internal fields MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Register the memory region with sysbus_init_mmio() and look it up with sysbus_mmio_get_region() to avoid accessing internal device fields. Suggested-by: Peter Maydell Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Aleksandar Markovic Reviewed-by: Philippe Mathieu-Daudé --- hw/char/serial.c | 1 + hw/mips/mips_mipssim.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/char/serial.c b/hw/char/serial.c index 7746dfcee8..6c327183c7 100644 --- a/hw/char/serial.c +++ b/hw/char/serial.c @@ -998,6 +998,7 @@ static void serial_io_realize(DeviceState *dev, Error **errp) } memory_region_init_io(&s->io, NULL, &serial_io_ops, s, "serial", 8); + sysbus_init_mmio(SYS_BUS_DEVICE(sio), &s->io); sysbus_init_irq(SYS_BUS_DEVICE(sio), &s->irq); } diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 2c2c7f25b2..84c03dd035 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -227,7 +227,8 @@ mips_mipssim_init(MachineState *machine) qdev_set_legacy_instance_id(dev, 0x3f8, 2); qdev_init_nofail(dev); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); - sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, &SERIAL_IO(dev)->serial.io); + sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); } if (nd_table[0].used) From 0ed40f16a17eaa3a53d62cc871779fa9d5b4447d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 23 Oct 2019 16:06:23 +0200 Subject: [PATCH 21/37] sm501: make SerialMM a child, export chardev property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Embed the SerialMM sybus device, and re-export its "chardev" property. That way, we can get rid of PROP_PTR "chr-state" and better track devices relationship. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/display/sm501.c | 29 +++++++++++++++++++++-------- hw/sh4/r2d.c | 2 +- 2 files changed, 22 insertions(+), 9 deletions(-) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index 79bd7bc2d1..66a1bfbe60 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1930,7 +1930,7 @@ typedef struct { SM501State state; uint32_t vram_size; uint32_t base; - void *chr_state; + SerialMM serial; } SM501SysBusState; static void sm501_realize_sysbus(DeviceState *dev, Error **errp) @@ -1938,6 +1938,7 @@ static void sm501_realize_sysbus(DeviceState *dev, Error **errp) SM501SysBusState *s = SYSBUS_SM501(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); DeviceState *usb_dev; + MemoryRegion *mr; sm501_init(&s->state, dev, s->vram_size); if (get_local_mem_size(&s->state) != s->vram_size) { @@ -1958,15 +1959,15 @@ static void sm501_realize_sysbus(DeviceState *dev, Error **errp) sysbus_pass_irq(sbd, SYS_BUS_DEVICE(usb_dev)); /* bridge to serial emulation module */ - serial_mm_init(&s->state.mmio_region, SM501_UART0, 2, - NULL, /* TODO : chain irq to IRL */ - 115200, s->chr_state, DEVICE_LITTLE_ENDIAN); + qdev_init_nofail(DEVICE(&s->serial)); + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->serial), 0); + memory_region_add_subregion(&s->state.mmio_region, SM501_UART0, mr); + /* TODO : chain irq to IRL */ } static Property sm501_sysbus_properties[] = { DEFINE_PROP_UINT32("vram-size", SM501SysBusState, vram_size, 0), DEFINE_PROP_UINT32("base", SM501SysBusState, base, 0), - DEFINE_PROP_PTR("chr-state", SM501SysBusState, chr_state), DEFINE_PROP_END_OF_LIST(), }; @@ -1997,9 +1998,20 @@ static void sm501_sysbus_class_init(ObjectClass *klass, void *data) dc->props = sm501_sysbus_properties; dc->reset = sm501_reset_sysbus; dc->vmsd = &vmstate_sm501_sysbus; - /* Note: pointer property "chr-state" may remain null, thus - * no need for dc->user_creatable = false; - */ +} + +static void sm501_sysbus_init(Object *o) +{ + SM501SysBusState *sm501 = SYSBUS_SM501(o); + SerialMM *smm = &sm501->serial; + + sysbus_init_child_obj(o, "serial", smm, sizeof(SerialMM), TYPE_SERIAL_MM); + qdev_set_legacy_instance_id(DEVICE(smm), SM501_UART0, 2); + qdev_prop_set_uint8(DEVICE(smm), "regshift", 2); + qdev_prop_set_uint8(DEVICE(smm), "endianness", DEVICE_LITTLE_ENDIAN); + + object_property_add_alias(o, "chardev", + OBJECT(smm), "chardev", &error_abort); } static const TypeInfo sm501_sysbus_info = { @@ -2007,6 +2019,7 @@ static const TypeInfo sm501_sysbus_info = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(SM501SysBusState), .class_init = sm501_sysbus_class_init, + .instance_init = sm501_sysbus_init, }; #define TYPE_PCI_SM501 "sm501" diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index ee0840f380..72bb5285cc 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -272,7 +272,7 @@ static void r2d_init(MachineState *machine) busdev = SYS_BUS_DEVICE(dev); qdev_prop_set_uint32(dev, "vram-size", SM501_VRAM_SIZE); qdev_prop_set_uint32(dev, "base", 0x10000000); - qdev_prop_set_ptr(dev, "chr-state", serial_hd(2)); + qdev_prop_set_chr(dev, "chardev", serial_hd(2)); qdev_init_nofail(dev); sysbus_mmio_map(busdev, 0, 0x10000000); sysbus_mmio_map(busdev, 1, 0x13e00000); From 0fe4bb3241110fc9fbd1c5c457d58191fcdca5d3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 17:06:05 +0200 Subject: [PATCH 22/37] vmmouse: replace PROP_PTR with PROP_LINK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit While at it, use the expected type. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 6 +++--- hw/i386/vmmouse.c | 8 +++----- hw/input/pckbd.c | 8 +++----- include/hw/input/i8042.h | 4 +++- 4 files changed, 12 insertions(+), 14 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a4fda69b49..8054bc4147 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1156,9 +1156,9 @@ static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, bool no_vmport) vmmouse = NULL; } if (vmmouse) { - DeviceState *dev = DEVICE(vmmouse); - qdev_prop_set_ptr(dev, "ps2_mouse", i8042); - qdev_init_nofail(dev); + object_property_set_link(OBJECT(vmmouse), OBJECT(i8042), + "i8042", &error_abort); + qdev_init_nofail(DEVICE(vmmouse)); } port92 = isa_create_simple(isa_bus, TYPE_PORT92); diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c index 41ad91ad53..c0c329f817 100644 --- a/hw/i386/vmmouse.c +++ b/hw/i386/vmmouse.c @@ -66,7 +66,7 @@ typedef struct VMMouseState uint16_t status; uint8_t absolute; QEMUPutMouseEntry *entry; - void *ps2_mouse; + ISAKBDState *i8042; } VMMouseState; static uint32_t vmmouse_get_status(VMMouseState *s) @@ -105,7 +105,7 @@ static void vmmouse_mouse_event(void *opaque, int x, int y, int dz, int buttons_ /* need to still generate PS2 events to notify driver to read from queue */ - i8042_isa_mouse_fake_event(s->ps2_mouse); + i8042_isa_mouse_fake_event(s->i8042); } static void vmmouse_remove_handler(VMMouseState *s) @@ -275,7 +275,7 @@ static void vmmouse_realizefn(DeviceState *dev, Error **errp) } static Property vmmouse_properties[] = { - DEFINE_PROP_PTR("ps2_mouse", VMMouseState, ps2_mouse), + DEFINE_PROP_LINK("i8042", VMMouseState, i8042, TYPE_I8042, ISAKBDState *), DEFINE_PROP_END_OF_LIST(), }; @@ -287,8 +287,6 @@ static void vmmouse_class_initfn(ObjectClass *klass, void *data) dc->reset = vmmouse_reset; dc->vmsd = &vmstate_vmmouse; dc->props = vmmouse_properties; - /* Reason: pointer property "ps2_mouse" */ - dc->user_creatable = false; } static const TypeInfo vmmouse_info = { diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c index 2f09f780ba..60a4130320 100644 --- a/hw/input/pckbd.c +++ b/hw/input/pckbd.c @@ -482,17 +482,15 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, #define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042) -typedef struct ISAKBDState { +struct ISAKBDState { ISADevice parent_obj; KBDState kbd; MemoryRegion io[2]; -} ISAKBDState; +}; -void i8042_isa_mouse_fake_event(void *opaque) +void i8042_isa_mouse_fake_event(ISAKBDState *isa) { - ISADevice *dev = opaque; - ISAKBDState *isa = I8042(dev); KBDState *s = &isa->kbd; ps2_mouse_fake_event(s->mouse); diff --git a/include/hw/input/i8042.h b/include/hw/input/i8042.h index 246e6f3335..8eaebf50ce 100644 --- a/include/hw/input/i8042.h +++ b/include/hw/input/i8042.h @@ -14,10 +14,12 @@ #define I8042_A20_LINE "a20" +typedef struct ISAKBDState ISAKBDState; + void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, MemoryRegion *region, ram_addr_t size, hwaddr mask); -void i8042_isa_mouse_fake_event(void *opaque); +void i8042_isa_mouse_fake_event(ISAKBDState *isa); void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out); #endif /* HW_INPUT_I8042_H */ From 4cc76287d81036909e43e29a7a42e8d9852041db Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 17:31:48 +0200 Subject: [PATCH 23/37] lance: replace PROP_PTR with PROP_LINK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The device remains non-user creatable since it is a sysbus device. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/dma/sparc32_dma.c | 2 +- hw/net/lance.c | 5 ++--- hw/net/pcnet-pci.c | 2 +- hw/net/pcnet.h | 2 +- 4 files changed, 5 insertions(+), 6 deletions(-) diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index 0e5bbcdc7f..3e4da0c47f 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -346,7 +346,7 @@ static void sparc32_ledma_device_realize(DeviceState *dev, Error **errp) d = qdev_create(NULL, TYPE_LANCE); object_property_add_child(OBJECT(dev), "lance", OBJECT(d), errp); qdev_set_nic_properties(d, nd); - qdev_prop_set_ptr(d, "dma", dev); + object_property_set_link(OBJECT(d), OBJECT(dev), "dma", errp); qdev_init_nofail(d); } diff --git a/hw/net/lance.c b/hw/net/lance.c index 6631e2a4e0..4d96299041 100644 --- a/hw/net/lance.c +++ b/hw/net/lance.c @@ -138,7 +138,8 @@ static void lance_instance_init(Object *obj) } static Property lance_properties[] = { - DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque), + DEFINE_PROP_LINK("dma", SysBusPCNetState, state.dma_opaque, + TYPE_DEVICE, DeviceState *), DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf), DEFINE_PROP_END_OF_LIST(), }; @@ -153,8 +154,6 @@ static void lance_class_init(ObjectClass *klass, void *data) dc->reset = lance_reset; dc->vmsd = &vmstate_lance; dc->props = lance_properties; - /* Reason: pointer property "dma" */ - dc->user_creatable = false; } static const TypeInfo lance_info = { diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c index 4723c30c79..d067d21e2c 100644 --- a/hw/net/pcnet-pci.c +++ b/hw/net/pcnet-pci.c @@ -231,7 +231,7 @@ static void pci_pcnet_realize(PCIDevice *pci_dev, Error **errp) s->irq = pci_allocate_irq(pci_dev); s->phys_mem_read = pci_physical_memory_read; s->phys_mem_write = pci_physical_memory_write; - s->dma_opaque = pci_dev; + s->dma_opaque = DEVICE(pci_dev); pcnet_common_init(DEVICE(pci_dev), s, &net_pci_pcnet_info); } diff --git a/hw/net/pcnet.h b/hw/net/pcnet.h index 28d19a5c6f..f49b213c57 100644 --- a/hw/net/pcnet.h +++ b/hw/net/pcnet.h @@ -50,7 +50,7 @@ struct PCNetState_st { uint8_t *buf, int len, int do_bswap); void (*phys_mem_write)(void *dma_opaque, hwaddr addr, uint8_t *buf, int len, int do_bswap); - void *dma_opaque; + DeviceState *dma_opaque; int tx_busy; int looptest; }; From 3af6eb8f9b489c72a1f540e752d8d5f1503b9a87 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 17:49:22 +0200 Subject: [PATCH 24/37] etraxfs: remove PROP_PTR usage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit etraxfs_dma_client are not Object, so can't be exposed to user with QOM path. Let's remove property usage and move the constructor to the .c unit, simplifying some code on the way. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell --- hw/net/etraxfs_eth.c | 44 +++++++++++++++++++++++++++++---------- include/hw/cris/etraxfs.h | 20 +++--------------- 2 files changed, 36 insertions(+), 28 deletions(-) diff --git a/hw/net/etraxfs_eth.c b/hw/net/etraxfs_eth.c index 4cfbf1135a..f30d963487 100644 --- a/hw/net/etraxfs_eth.c +++ b/hw/net/etraxfs_eth.c @@ -338,14 +338,8 @@ typedef struct ETRAXFSEthState uint8_t macaddr[2][6]; uint32_t regs[FS_ETH_MAX_REGS]; - union { - void *vdma_out; - struct etraxfs_dma_client *dma_out; - }; - union { - void *vdma_in; - struct etraxfs_dma_client *dma_in; - }; + struct etraxfs_dma_client *dma_out; + struct etraxfs_dma_client *dma_in; /* MDIO bus. */ struct qemu_mdio mdio_bus; @@ -635,8 +629,6 @@ static void etraxfs_eth_realize(DeviceState *dev, Error **errp) static Property etraxfs_eth_properties[] = { DEFINE_PROP_UINT32("phyaddr", ETRAXFSEthState, phyaddr, 1), - DEFINE_PROP_PTR("dma_out", ETRAXFSEthState, vdma_out), - DEFINE_PROP_PTR("dma_in", ETRAXFSEthState, vdma_in), DEFINE_NIC_PROPERTIES(ETRAXFSEthState, conf), DEFINE_PROP_END_OF_LIST(), }; @@ -648,10 +640,40 @@ static void etraxfs_eth_class_init(ObjectClass *klass, void *data) dc->realize = etraxfs_eth_realize; dc->reset = etraxfs_eth_reset; dc->props = etraxfs_eth_properties; - /* Reason: pointer properties "dma_out", "dma_in" */ + /* Reason: dma_out, dma_in are not user settable */ dc->user_creatable = false; } + +/* Instantiate an ETRAXFS Ethernet MAC. */ +DeviceState * +etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr, + struct etraxfs_dma_client *dma_out, + struct etraxfs_dma_client *dma_in) +{ + DeviceState *dev; + qemu_check_nic_model(nd, "fseth"); + + dev = qdev_create(NULL, "etraxfs-eth"); + qdev_set_nic_properties(dev, nd); + qdev_prop_set_uint32(dev, "phyaddr", phyaddr); + + /* + * TODO: QOM design, define a QOM interface for "I am an etraxfs + * DMA client" (which replaces the current 'struct + * etraxfs_dma_client' ad-hoc interface), implement it on the + * ethernet device, and then have QOM link properties on the DMA + * controller device so that you can pass the interface + * implementations to it. + */ + ETRAX_FS_ETH(dev)->dma_out = dma_out; + ETRAX_FS_ETH(dev)->dma_in = dma_in; + qdev_init_nofail(dev); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); + + return dev; +} + static const TypeInfo etraxfs_eth_info = { .name = TYPE_ETRAX_FS_ETH, .parent = TYPE_SYS_BUS_DEVICE, diff --git a/include/hw/cris/etraxfs.h b/include/hw/cris/etraxfs.h index aa146a2cd8..403e7f95e6 100644 --- a/include/hw/cris/etraxfs.h +++ b/include/hw/cris/etraxfs.h @@ -30,23 +30,9 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" -/* Instantiate an ETRAXFS Ethernet MAC. */ -static inline DeviceState * -etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr, - void *dma_out, void *dma_in) -{ - DeviceState *dev; - qemu_check_nic_model(nd, "fseth"); - - dev = qdev_create(NULL, "etraxfs-eth"); - qdev_set_nic_properties(dev, nd); - qdev_prop_set_uint32(dev, "phyaddr", phyaddr); - qdev_prop_set_ptr(dev, "dma_out", dma_out); - qdev_prop_set_ptr(dev, "dma_in", dma_in); - qdev_init_nofail(dev); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); - return dev; -} +DeviceState *etraxfs_eth_init(NICInfo *nd, hwaddr base, int phyaddr, + struct etraxfs_dma_client *dma_out, + struct etraxfs_dma_client *dma_in); static inline DeviceState *etraxfs_ser_create(hwaddr addr, qemu_irq irq, From 3110ce819278f1b6d2c4fdd3e15e773e8f226316 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 18:03:43 +0200 Subject: [PATCH 25/37] dp8393x: replace PROP_PTR with PROP_LINK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Link property is the correct way to pass a MemoryRegion to a device for DMA purposes. Sidenote: as a sysbus device, this remains non-usercreatable even though we can drop the specific flag here. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Laurent Vivier Tested-by: Laurent Vivier --- hw/m68k/q800.c | 3 ++- hw/mips/mips_jazz.c | 3 ++- hw/net/dp8393x.c | 7 +++---- 3 files changed, 7 insertions(+), 6 deletions(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 4ca8678007..8f3eb6bfe7 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -239,7 +239,8 @@ static void q800_init(MachineState *machine) qdev_set_nic_properties(dev, &nd_table[0]); qdev_prop_set_uint8(dev, "it_shift", 2); qdev_prop_set_bit(dev, "big_endian", true); - qdev_prop_set_ptr(dev, "dma_mr", get_system_memory()); + object_property_set_link(OBJECT(dev), OBJECT(get_system_memory()), + "dma_mr", &error_abort); qdev_init_nofail(dev); sysbus = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, SONIC_BASE); diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index 291fd6c1b8..66fd4d867d 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -290,7 +290,8 @@ static void mips_jazz_init(MachineState *machine, dev = qdev_create(NULL, "dp8393x"); qdev_set_nic_properties(dev, nd); qdev_prop_set_uint8(dev, "it_shift", 2); - qdev_prop_set_ptr(dev, "dma_mr", rc4030_dma_mr); + object_property_set_link(OBJECT(dev), OBJECT(rc4030_dma_mr), + "dma_mr", &error_abort); qdev_init_nofail(dev); sysbus = SYS_BUS_DEVICE(dev); sysbus_mmio_map(sysbus, 0, 0x80001000); diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index 3d991af163..cdc2631c0c 100644 --- a/hw/net/dp8393x.c +++ b/hw/net/dp8393x.c @@ -175,7 +175,7 @@ typedef struct dp8393xState { int loopback_packet; /* Memory access */ - void *dma_mr; + MemoryRegion *dma_mr; AddressSpace as; } dp8393xState; @@ -948,7 +948,8 @@ static const VMStateDescription vmstate_dp8393x = { static Property dp8393x_properties[] = { DEFINE_NIC_PROPERTIES(dp8393xState, conf), - DEFINE_PROP_PTR("dma_mr", dp8393xState, dma_mr), + DEFINE_PROP_LINK("dma_mr", dp8393xState, dma_mr, + TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_UINT8("it_shift", dp8393xState, it_shift, 0), DEFINE_PROP_BOOL("big_endian", dp8393xState, big_endian, false), DEFINE_PROP_END_OF_LIST(), @@ -963,8 +964,6 @@ static void dp8393x_class_init(ObjectClass *klass, void *data) dc->reset = dp8393x_reset; dc->vmsd = &vmstate_dp8393x; dc->props = dp8393x_properties; - /* Reason: dma_mr property can't be set */ - dc->user_creatable = false; } static const TypeInfo dp8393x_info = { From ab4c072d2f2f4d2e4bfa54bb89e43e2b4cb86275 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 18:42:35 +0200 Subject: [PATCH 26/37] leon3: use qemu_irq framework instead of callback as property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit "set_pin_in" property is used to define a callback mechanism where the device says "call the callback function, passing it an opaque cookie and a 32-bit value". We already have a generic mechanism for doing that, which is the qemu_irq. So we should just use that. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: KONRAD Frederic --- hw/intc/grlib_irqmp.c | 35 ++++------------------------------- hw/sparc/leon3.c | 13 +++++++++---- target/sparc/cpu.h | 1 + 3 files changed, 14 insertions(+), 35 deletions(-) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index bc78e1a14f..794c643af2 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -25,6 +25,7 @@ */ #include "qemu/osdep.h" +#include "hw/irq.h" #include "hw/sysbus.h" #include "cpu.h" @@ -58,10 +59,8 @@ typedef struct IRQMP { MemoryRegion iomem; - void *set_pil_in; - void *set_pil_in_opaque; - IRQMPState *state; + qemu_irq irq; } IRQMP; struct IRQMPState { @@ -82,7 +81,6 @@ static void grlib_irqmp_check_irqs(IRQMPState *state) uint32_t pend = 0; uint32_t level0 = 0; uint32_t level1 = 0; - set_pil_in_fn set_pil_in; assert(state != NULL); assert(state->parent != NULL); @@ -97,14 +95,8 @@ static void grlib_irqmp_check_irqs(IRQMPState *state) trace_grlib_irqmp_check_irqs(state->pending, state->force[0], state->mask[0], level1, level0); - set_pil_in = (set_pil_in_fn)state->parent->set_pil_in; - /* Trigger level1 interrupt first and level0 if there is no level1 */ - if (level1 != 0) { - set_pil_in(state->parent->set_pil_in_opaque, level1); - } else { - set_pil_in(state->parent->set_pil_in_opaque, level0); - } + qemu_set_irq(state->parent->irq, level1 ?: level0); } static void grlib_irqmp_ack_mask(IRQMPState *state, uint32_t mask) @@ -335,6 +327,7 @@ static void grlib_irqmp_init(Object *obj) IRQMP *irqmp = GRLIB_IRQMP(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj); + qdev_init_gpio_out_named(DEVICE(obj), &irqmp->irq, "grlib-irq", 1); memory_region_init_io(&irqmp->iomem, obj, &grlib_irqmp_ops, irqmp, "irqmp", IRQMP_REG_SIZE); @@ -343,31 +336,11 @@ static void grlib_irqmp_init(Object *obj) sysbus_init_mmio(dev, &irqmp->iomem); } -static void grlib_irqmp_realize(DeviceState *dev, Error **errp) -{ - IRQMP *irqmp = GRLIB_IRQMP(dev); - - /* Check parameters */ - if (irqmp->set_pil_in == NULL) { - error_setg(errp, "set_pil_in cannot be NULL."); - } -} - -static Property grlib_irqmp_properties[] = { - DEFINE_PROP_PTR("set_pil_in", IRQMP, set_pil_in), - DEFINE_PROP_PTR("set_pil_in_opaque", IRQMP, set_pil_in_opaque), - DEFINE_PROP_END_OF_LIST(), -}; - static void grlib_irqmp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->reset = grlib_irqmp_reset; - dc->props = grlib_irqmp_properties; - /* Reason: pointer properties "set_pil_in", "set_pil_in_opaque" */ - dc->user_creatable = false; - dc->realize = grlib_irqmp_realize; } static const TypeInfo grlib_irqmp_info = { diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index c5f1b1ee72..cac987373e 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -143,9 +143,14 @@ void leon3_irq_ack(void *irq_manager, int intno) grlib_irqmp_ack((DeviceState *)irq_manager, intno); } -static void leon3_set_pil_in(void *opaque, uint32_t pil_in) +/* + * This device assumes that the incoming 'level' value on the + * qemu_irq is the interrupt number, not just a simple 0/1 level. + */ +static void leon3_set_pil_in(void *opaque, int n, int level) { - CPUSPARCState *env = (CPUSPARCState *)opaque; + CPUSPARCState *env = opaque; + uint32_t pil_in = level; CPUState *cs; assert(env != NULL); @@ -225,8 +230,8 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate IRQ manager */ dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); - qdev_prop_set_ptr(dev, "set_pil_in", leon3_set_pil_in); - qdev_prop_set_ptr(dev, "set_pil_in_opaque", env); + env->pil_irq = qemu_allocate_irq(leon3_set_pil_in, env, 0); + qdev_connect_gpio_out_named(dev, "grlib-irq", 0, env->pil_irq); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); env->irq_manager = dev; diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index ae97c7d9f7..e70fec0133 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -541,6 +541,7 @@ struct CPUSPARCState { #endif sparc_def_t def; + qemu_irq pil_irq; void *irq_manager; void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno); From e23ae617f68420248a978c1040686658a34a7f95 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 17:38:51 +0400 Subject: [PATCH 27/37] leon3: use qdev gpio facilities for the PIL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As Peter Maydell once said: "Creating a gpio pin on some object that isn't yourself looks a bit odd, but all this leon3 code is modifying the CPU object from the outside anyway. Someday we might tidy it up, but not today." Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 6 ++++-- target/sparc/cpu.h | 1 - 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index cac987373e..8038887ff7 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -230,8 +230,10 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate IRQ manager */ dev = qdev_create(NULL, TYPE_GRLIB_IRQMP); - env->pil_irq = qemu_allocate_irq(leon3_set_pil_in, env, 0); - qdev_connect_gpio_out_named(dev, "grlib-irq", 0, env->pil_irq); + qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, + env, "pil", 1); + qdev_connect_gpio_out_named(dev, "grlib-irq", 0, + qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); env->irq_manager = dev; diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index e70fec0133..ae97c7d9f7 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -541,7 +541,6 @@ struct CPUSPARCState { #endif sparc_def_t def; - qemu_irq pil_irq; void *irq_manager; void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno); From 3a87dde8a05978401fb846b6513503b9fd4186d9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Wed, 20 Nov 2019 17:42:01 +0400 Subject: [PATCH 28/37] qdev: use g_strcmp0() instead of open-coding it MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Minor code simplification. Signed-off-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé --- hw/core/qdev.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 501228ba08..aa3ccbf2ec 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -394,11 +394,8 @@ static NamedGPIOList *qdev_get_named_gpio_list(DeviceState *dev, NamedGPIOList *ngl; QLIST_FOREACH(ngl, &dev->gpios, node) { - /* NULL is a valid and matchable name, otherwise do a normal - * strcmp match. - */ - if ((!ngl->name && !name) || - (name && ngl->name && strcmp(name, ngl->name) == 0)) { + /* NULL is a valid and matchable name. */ + if (g_strcmp0(name, ngl->name) == 0) { return ngl; } } From 3cff81733da62eaea2252e638ea47849cf284ceb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 19:04:11 +0200 Subject: [PATCH 29/37] mips/cps: fix setting saar property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There is no "saar" property. Note: I haven't been able to test this code. Help welcome. May fix commit 043715d1e0fbb3e3411be3f898c5b77b7f90327a ("target/mips: Update ITU to utilize SAARI and SAAR CP0 registers") Signed-off-by: Marc-André Lureau Reviewed-by: Aleksandar Markovic --- hw/mips/cps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 1660f86908..c49868d5da 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -106,7 +106,7 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->itu), saar_present, "saar-present", &err); if (saar_present) { - qdev_prop_set_ptr(DEVICE(&s->itu), "saar", (void *)&env->CP0_SAAR); + s->itu.saar = &env->CP0_SAAR; } object_property_set_bool(OBJECT(&s->itu), true, "realized", &err); if (err != NULL) { From f4f643882d9dc4676411d1f5fcf9393aa745570b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Thu, 17 Oct 2019 19:16:53 +0200 Subject: [PATCH 30/37] cris: improve passing PIC interrupt vector to the CPU MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead of accessing cpu interrupt vector directly from PIC, send the vector value over the qemu_irq. Suggested-by: Peter Maydell Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/cris/axis_dev88.c | 4 ---- hw/intc/etraxfs_pic.c | 26 +------------------------- target/cris/cpu.c | 8 ++++++++ target/cris/cpu.h | 1 + 4 files changed, 10 insertions(+), 29 deletions(-) diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c index 940c7dd122..be7760476a 100644 --- a/hw/cris/axis_dev88.c +++ b/hw/cris/axis_dev88.c @@ -253,7 +253,6 @@ void axisdev88_init(MachineState *machine) const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; CRISCPU *cpu; - CPUCRISState *env; DeviceState *dev; SysBusDevice *s; DriveInfo *nand; @@ -267,7 +266,6 @@ void axisdev88_init(MachineState *machine) /* init CPUs */ cpu = CRIS_CPU(cpu_create(machine->cpu_type)); - env = &cpu->env; /* allocate RAM */ memory_region_allocate_system_memory(phys_ram, NULL, "axisdev88.ram", @@ -297,8 +295,6 @@ void axisdev88_init(MachineState *machine) dev = qdev_create(NULL, "etraxfs,pic"); - /* FIXME: Is there a proper way to signal vectors to the CPU core? */ - qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); sysbus_mmio_map(s, 0, 0x3001c000); diff --git a/hw/intc/etraxfs_pic.c b/hw/intc/etraxfs_pic.c index 77f652acec..12988c7aa9 100644 --- a/hw/intc/etraxfs_pic.c +++ b/hw/intc/etraxfs_pic.c @@ -27,8 +27,6 @@ #include "qemu/module.h" #include "hw/irq.h" #include "hw/qdev-properties.h" -//#include "pc.h" -//#include "etraxfs.h" #define D(x) @@ -48,7 +46,6 @@ struct etrax_pic SysBusDevice parent_obj; MemoryRegion mmio; - void *interrupt_vector; qemu_irq parent_irq; qemu_irq parent_nmi; uint32_t regs[R_MAX]; @@ -79,11 +76,7 @@ static void pic_update(struct etrax_pic *fs) } } - if (fs->interrupt_vector) { - /* hack alert: ptr property */ - *(uint32_t*)(fs->interrupt_vector) = vector; - } - qemu_set_irq(fs->parent_irq, !!vector); + qemu_set_irq(fs->parent_irq, vector); } static uint64_t @@ -163,28 +156,11 @@ static void etraxfs_pic_init(Object *obj) sysbus_init_mmio(sbd, &s->mmio); } -static Property etraxfs_pic_properties[] = { - DEFINE_PROP_PTR("interrupt_vector", struct etrax_pic, interrupt_vector), - DEFINE_PROP_END_OF_LIST(), -}; - -static void etraxfs_pic_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - - dc->props = etraxfs_pic_properties; - /* - * Note: pointer property "interrupt_vector" may remain null, thus - * no need for dc->user_creatable = false; - */ -} - static const TypeInfo etraxfs_pic_info = { .name = TYPE_ETRAX_FS_PIC, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(struct etrax_pic), .instance_init = etraxfs_pic_init, - .class_init = etraxfs_pic_class_init, }; static void etraxfs_pic_register_types(void) diff --git a/target/cris/cpu.c b/target/cris/cpu.c index 7adfd6caf4..6a857f548d 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -147,6 +147,14 @@ static void cris_cpu_set_irq(void *opaque, int irq, int level) CPUState *cs = CPU(cpu); int type = irq == CRIS_CPU_IRQ ? CPU_INTERRUPT_HARD : CPU_INTERRUPT_NMI; + if (irq == CRIS_CPU_IRQ) { + /* + * The PIC passes us the vector for the IRQ as the value it sends + * over the qemu_irq line + */ + cpu->env.interrupt_vector = level; + } + if (level) { cpu_interrupt(cs, type); } else { diff --git a/target/cris/cpu.h b/target/cris/cpu.h index aba0a66474..a7c2a8e15b 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -34,6 +34,7 @@ #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3 /* CRUS CPU device objects interrupt lines. */ +/* PIC passes the vector for the IRQ as the value of it sends over qemu_irq */ #define CRIS_CPU_IRQ 0 #define CRIS_CPU_NMI 1 From b9751d205febdfefdb9bb9828fef07ae9a966f1b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 12:19:36 +0200 Subject: [PATCH 31/37] smbus-eeprom: remove PROP_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Instead, set the initial data field directly. (the initial data is an array of 256 bytes. As I don't know if it may change over time, I keep the pointer to original buffer as is, but it might be worth to consider to copy it instead) Signed-off-by: Marc-André Lureau Reviewed-by: Corey Minyard --- hw/i2c/smbus_eeprom.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/i2c/smbus_eeprom.c b/hw/i2c/smbus_eeprom.c index 54c86a0112..5adf3b15b5 100644 --- a/hw/i2c/smbus_eeprom.c +++ b/hw/i2c/smbus_eeprom.c @@ -44,7 +44,7 @@ typedef struct SMBusEEPROMDevice { SMBusDevice smbusdev; uint8_t data[SMBUS_EEPROM_SIZE]; - void *init_data; + uint8_t *init_data; uint8_t offset; bool accessed; } SMBusEEPROMDevice; @@ -129,13 +129,13 @@ static void smbus_eeprom_reset(DeviceState *dev) static void smbus_eeprom_realize(DeviceState *dev, Error **errp) { - smbus_eeprom_reset(dev); -} + SMBusEEPROMDevice *eeprom = SMBUS_EEPROM(dev); -static Property smbus_eeprom_properties[] = { - DEFINE_PROP_PTR("data", SMBusEEPROMDevice, init_data), - DEFINE_PROP_END_OF_LIST(), -}; + smbus_eeprom_reset(dev); + if (eeprom->init_data == NULL) { + error_setg(errp, "init_data cannot be NULL"); + } +} static void smbus_eeprom_class_initfn(ObjectClass *klass, void *data) { @@ -146,9 +146,8 @@ static void smbus_eeprom_class_initfn(ObjectClass *klass, void *data) dc->reset = smbus_eeprom_reset; sc->receive_byte = eeprom_receive_byte; sc->write_data = eeprom_write_data; - dc->props = smbus_eeprom_properties; dc->vmsd = &vmstate_smbus_eeprom; - /* Reason: pointer property "data" */ + /* Reason: init_data */ dc->user_creatable = false; } @@ -172,7 +171,8 @@ void smbus_eeprom_init_one(I2CBus *smbus, uint8_t address, uint8_t *eeprom_buf) dev = qdev_create((BusState *) smbus, TYPE_SMBUS_EEPROM); qdev_prop_set_uint8(dev, "address", address); - qdev_prop_set_ptr(dev, "data", eeprom_buf); + /* FIXME: use an array of byte or block backend property? */ + SMBUS_EEPROM(dev)->init_data = eeprom_buf; qdev_init_nofail(dev); } From bab592a259a6603922a4f54caedb6e52da692e35 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 14:42:57 +0200 Subject: [PATCH 32/37] omap-intc: remove PROP_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. (in theory there should probably be different methods for omap1 & omap2 intc, but this is left as a future improvement) Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/omap1.c | 4 ++-- hw/arm/omap2.c | 4 ++-- hw/intc/omap_intc.c | 17 ++++++++++------- include/hw/arm/omap.h | 14 ++++++++++++++ 4 files changed, 28 insertions(+), 11 deletions(-) diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 6ce038a453..1afd1d3d7f 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -3889,7 +3889,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->ih[0] = qdev_create(NULL, "omap-intc"); qdev_prop_set_uint32(s->ih[0], "size", 0x100); - qdev_prop_set_ptr(s->ih[0], "clk", omap_findclk(s, "arminth_ck")); + omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "arminth_ck")); qdev_init_nofail(s->ih[0]); busdev = SYS_BUS_DEVICE(s->ih[0]); sysbus_connect_irq(busdev, 0, @@ -3899,7 +3899,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, sysbus_mmio_map(busdev, 0, 0xfffecb00); s->ih[1] = qdev_create(NULL, "omap-intc"); qdev_prop_set_uint32(s->ih[1], "size", 0x800); - qdev_prop_set_ptr(s->ih[1], "clk", omap_findclk(s, "arminth_ck")); + omap_intc_set_iclk(OMAP_INTC(s->ih[1]), omap_findclk(s, "arminth_ck")); qdev_init_nofail(s->ih[1]); busdev = SYS_BUS_DEVICE(s->ih[1]); sysbus_connect_irq(busdev, 0, diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index 457f152bac..1d7cc435ef 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2308,8 +2308,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, /* Actually mapped at any 2K boundary in the ARM11 private-peripheral if */ s->ih[0] = qdev_create(NULL, "omap2-intc"); qdev_prop_set_uint8(s->ih[0], "revision", 0x21); - qdev_prop_set_ptr(s->ih[0], "fclk", omap_findclk(s, "mpu_intc_fclk")); - qdev_prop_set_ptr(s->ih[0], "iclk", omap_findclk(s, "mpu_intc_iclk")); + omap_intc_set_fclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_fclk")); + omap_intc_set_iclk(OMAP_INTC(s->ih[0]), omap_findclk(s, "mpu_intc_iclk")); qdev_init_nofail(s->ih[0]); busdev = SYS_BUS_DEVICE(s->ih[0]); sysbus_connect_irq(busdev, 0, diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c index 854b709ca0..73bb1c2af4 100644 --- a/hw/intc/omap_intc.c +++ b/hw/intc/omap_intc.c @@ -38,10 +38,6 @@ struct omap_intr_handler_bank_s { unsigned char priority[32]; }; -#define TYPE_OMAP_INTC "common-omap-intc" -#define OMAP_INTC(obj) \ - OBJECT_CHECK(struct omap_intr_handler_s, (obj), TYPE_OMAP_INTC) - struct omap_intr_handler_s { SysBusDevice parent_obj; @@ -391,9 +387,18 @@ static void omap_intc_realize(DeviceState *dev, Error **errp) } } +void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk) +{ + intc->iclk = clk; +} + +void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk) +{ + intc->fclk = clk; +} + static Property omap_intc_properties[] = { DEFINE_PROP_UINT32("size", struct omap_intr_handler_s, size, 0x100), - DEFINE_PROP_PTR("clk", struct omap_intr_handler_s, iclk), DEFINE_PROP_END_OF_LIST(), }; @@ -647,8 +652,6 @@ static void omap2_intc_realize(DeviceState *dev, Error **errp) static Property omap2_intc_properties[] = { DEFINE_PROP_UINT8("revision", struct omap_intr_handler_s, revision, 0x21), - DEFINE_PROP_PTR("iclk", struct omap_intr_handler_s, iclk), - DEFINE_PROP_PTR("fclk", struct omap_intr_handler_s, fclk), DEFINE_PROP_END_OF_LIST(), }; diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index f3aa670036..bcecf19f89 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -67,6 +67,20 @@ void omap_clk_setrate(omap_clk clk, int divide, int multiply); int64_t omap_clk_getrate(omap_clk clk); void omap_clk_reparent(omap_clk clk, omap_clk parent); +/* omap_intc.c */ +#define TYPE_OMAP_INTC "common-omap-intc" +#define OMAP_INTC(obj) \ + OBJECT_CHECK(omap_intr_handler, (obj), TYPE_OMAP_INTC) + +typedef struct omap_intr_handler_s omap_intr_handler; + +/* + * TODO: Ideally we should have a clock framework that + * let us wire these clocks up with QOM properties or links. + */ +void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk); +void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk); + /* OMAP2 l4 Interconnect */ struct omap_l4_s; struct omap_l4_region_s { From 0fd20c532faa6d5ebed8a43763f96a4829b33be2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 14:56:44 +0200 Subject: [PATCH 33/37] omap-i2c: remove PROP_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Corey Minyard Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/omap1.c | 2 +- hw/arm/omap2.c | 8 ++++---- hw/i2c/omap_i2c.c | 19 ++++++++++++------- include/hw/arm/omap.h | 13 +++++++++++++ 4 files changed, 30 insertions(+), 12 deletions(-) diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 1afd1d3d7f..807e5f70d1 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -4030,7 +4030,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->i2c[0] = qdev_create(NULL, "omap_i2c"); qdev_prop_set_uint8(s->i2c[0], "revision", 0x11); - qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "mpuper_ck")); + omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "mpuper_ck")); qdev_init_nofail(s->i2c[0]); busdev = SYS_BUS_DEVICE(s->i2c[0]); sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(s->ih[1], OMAP_INT_I2C)); diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index 1d7cc435ef..171e2d0472 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2425,8 +2425,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, s->i2c[0] = qdev_create(NULL, "omap_i2c"); qdev_prop_set_uint8(s->i2c[0], "revision", 0x34); - qdev_prop_set_ptr(s->i2c[0], "iclk", omap_findclk(s, "i2c1.iclk")); - qdev_prop_set_ptr(s->i2c[0], "fclk", omap_findclk(s, "i2c1.fclk")); + omap_i2c_set_iclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.iclk")); + omap_i2c_set_fclk(OMAP_I2C(s->i2c[0]), omap_findclk(s, "i2c1.fclk")); qdev_init_nofail(s->i2c[0]); busdev = SYS_BUS_DEVICE(s->i2c[0]); sysbus_connect_irq(busdev, 0, @@ -2437,8 +2437,8 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, s->i2c[1] = qdev_create(NULL, "omap_i2c"); qdev_prop_set_uint8(s->i2c[1], "revision", 0x34); - qdev_prop_set_ptr(s->i2c[1], "iclk", omap_findclk(s, "i2c2.iclk")); - qdev_prop_set_ptr(s->i2c[1], "fclk", omap_findclk(s, "i2c2.fclk")); + omap_i2c_set_iclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.iclk")); + omap_i2c_set_fclk(OMAP_I2C(s->i2c[1]), omap_findclk(s, "i2c2.fclk")); qdev_init_nofail(s->i2c[1]); busdev = SYS_BUS_DEVICE(s->i2c[1]); sysbus_connect_irq(busdev, 0, diff --git a/hw/i2c/omap_i2c.c b/hw/i2c/omap_i2c.c index 3ba965a58f..3ccbd5cc2c 100644 --- a/hw/i2c/omap_i2c.c +++ b/hw/i2c/omap_i2c.c @@ -28,10 +28,7 @@ #include "qemu/error-report.h" #include "qapi/error.h" -#define TYPE_OMAP_I2C "omap_i2c" -#define OMAP_I2C(obj) OBJECT_CHECK(OMAPI2CState, (obj), TYPE_OMAP_I2C) - -typedef struct OMAPI2CState { +struct OMAPI2CState { SysBusDevice parent_obj; MemoryRegion iomem; @@ -56,7 +53,7 @@ typedef struct OMAPI2CState { uint8_t divider; uint8_t times[2]; uint16_t test; -} OMAPI2CState; +}; #define OMAP2_INTR_REV 0x34 #define OMAP2_GC_REV 0x34 @@ -504,10 +501,18 @@ static void omap_i2c_realize(DeviceState *dev, Error **errp) } } +void omap_i2c_set_iclk(OMAPI2CState *i2c, omap_clk clk) +{ + i2c->iclk = clk; +} + +void omap_i2c_set_fclk(OMAPI2CState *i2c, omap_clk clk) +{ + i2c->fclk = clk; +} + static Property omap_i2c_properties[] = { DEFINE_PROP_UINT8("revision", OMAPI2CState, revision, 0), - DEFINE_PROP_PTR("iclk", OMAPI2CState, iclk), - DEFINE_PROP_PTR("fclk", OMAPI2CState, fclk), DEFINE_PROP_END_OF_LIST(), }; diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index bcecf19f89..39a295ba20 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -81,6 +81,19 @@ typedef struct omap_intr_handler_s omap_intr_handler; void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk); void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk); +/* omap_i2c.c */ +#define TYPE_OMAP_I2C "omap_i2c" +#define OMAP_I2C(obj) OBJECT_CHECK(OMAPI2CState, (obj), TYPE_OMAP_I2C) + +typedef struct OMAPI2CState OMAPI2CState; + +/* + * TODO: Ideally we should have a clock framework that + * let us wire these clocks up with QOM properties or links. + */ +void omap_i2c_set_iclk(OMAPI2CState *i2c, omap_clk clk); +void omap_i2c_set_fclk(OMAPI2CState *i2c, omap_clk clk); + /* OMAP2 l4 Interconnect */ struct omap_l4_s; struct omap_l4_region_s { From ba2aba8370e33a44ff5619844b90bb7119c5cebf Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 15:26:19 +0200 Subject: [PATCH 34/37] omap-gpio: remove PROP_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since clocks are not QOM objects, replace PROP_PTR of clocks with setters methods. Move/adapt the existing TODO comment about a clock framework. Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- hw/arm/omap1.c | 2 +- hw/arm/omap2.c | 13 +++++++------ hw/gpio/omap_gpio.c | 42 +++++++++++++++--------------------------- include/hw/arm/omap.h | 33 +++++++++++++++++++++++++++++---- 4 files changed, 52 insertions(+), 38 deletions(-) diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 807e5f70d1..761cc17ea9 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -4012,7 +4012,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *dram, s->gpio = qdev_create(NULL, "omap-gpio"); qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); - qdev_prop_set_ptr(s->gpio, "clk", omap_findclk(s, "arm_gpio_ck")); + omap_gpio_set_clk(OMAP1_GPIO(s->gpio), omap_findclk(s, "arm_gpio_ck")); qdev_init_nofail(s->gpio); sysbus_connect_irq(SYS_BUS_DEVICE(s->gpio), 0, qdev_get_gpio_in(s->ih[0], OMAP_INT_GPIO_BANK1)); diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index 171e2d0472..e1c11de5ce 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2449,13 +2449,14 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegion *sdram, s->gpio = qdev_create(NULL, "omap2-gpio"); qdev_prop_set_int32(s->gpio, "mpu_model", s->mpu_model); - qdev_prop_set_ptr(s->gpio, "iclk", omap_findclk(s, "gpio_iclk")); - qdev_prop_set_ptr(s->gpio, "fclk0", omap_findclk(s, "gpio1_dbclk")); - qdev_prop_set_ptr(s->gpio, "fclk1", omap_findclk(s, "gpio2_dbclk")); - qdev_prop_set_ptr(s->gpio, "fclk2", omap_findclk(s, "gpio3_dbclk")); - qdev_prop_set_ptr(s->gpio, "fclk3", omap_findclk(s, "gpio4_dbclk")); + omap2_gpio_set_iclk(OMAP2_GPIO(s->gpio), omap_findclk(s, "gpio_iclk")); + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 0, omap_findclk(s, "gpio1_dbclk")); + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 1, omap_findclk(s, "gpio2_dbclk")); + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 2, omap_findclk(s, "gpio3_dbclk")); + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 3, omap_findclk(s, "gpio4_dbclk")); if (s->mpu_model == omap2430) { - qdev_prop_set_ptr(s->gpio, "fclk4", omap_findclk(s, "gpio5_dbclk")); + omap2_gpio_set_fclk(OMAP2_GPIO(s->gpio), 4, + omap_findclk(s, "gpio5_dbclk")); } qdev_init_nofail(s->gpio); busdev = SYS_BUS_DEVICE(s->gpio); diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c index 41e1aa798c..85c16897ae 100644 --- a/hw/gpio/omap_gpio.c +++ b/hw/gpio/omap_gpio.c @@ -40,10 +40,6 @@ struct omap_gpio_s { uint16_t pins; }; -#define TYPE_OMAP1_GPIO "omap-gpio" -#define OMAP1_GPIO(obj) \ - OBJECT_CHECK(struct omap_gpif_s, (obj), TYPE_OMAP1_GPIO) - struct omap_gpif_s { SysBusDevice parent_obj; @@ -212,10 +208,6 @@ struct omap2_gpio_s { uint8_t delay; }; -#define TYPE_OMAP2_GPIO "omap2-gpio" -#define OMAP2_GPIO(obj) \ - OBJECT_CHECK(struct omap2_gpif_s, (obj), TYPE_OMAP2_GPIO) - struct omap2_gpif_s { SysBusDevice parent_obj; @@ -747,21 +739,13 @@ static void omap2_gpio_realize(DeviceState *dev, Error **errp) } } -/* Using qdev pointer properties for the clocks is not ideal. - * qdev should support a generic means of defining a 'port' with - * an arbitrary interface for connecting two devices. Then we - * could reframe the omap clock API in terms of clock ports, - * and get some type safety. For now the best qdev provides is - * passing an arbitrary pointer. - * (It's not possible to pass in the string which is the clock - * name, because this device does not have the necessary information - * (ie the struct omap_mpu_state_s*) to do the clockname to pointer - * translation.) - */ +void omap_gpio_set_clk(omap_gpif *gpio, omap_clk clk) +{ + gpio->clk = clk; +} static Property omap_gpio_properties[] = { DEFINE_PROP_INT32("mpu_model", struct omap_gpif_s, mpu_model, 0), - DEFINE_PROP_PTR("clk", struct omap_gpif_s, clk), DEFINE_PROP_END_OF_LIST(), }; @@ -784,15 +768,19 @@ static const TypeInfo omap_gpio_info = { .class_init = omap_gpio_class_init, }; +void omap2_gpio_set_iclk(omap2_gpif *gpio, omap_clk clk) +{ + gpio->iclk = clk; +} + +void omap2_gpio_set_fclk(omap2_gpif *gpio, uint8_t i, omap_clk clk) +{ + assert(i <= 5); + gpio->fclk[i] = clk; +} + static Property omap2_gpio_properties[] = { DEFINE_PROP_INT32("mpu_model", struct omap2_gpif_s, mpu_model, 0), - DEFINE_PROP_PTR("iclk", struct omap2_gpif_s, iclk), - DEFINE_PROP_PTR("fclk0", struct omap2_gpif_s, fclk[0]), - DEFINE_PROP_PTR("fclk1", struct omap2_gpif_s, fclk[1]), - DEFINE_PROP_PTR("fclk2", struct omap2_gpif_s, fclk[2]), - DEFINE_PROP_PTR("fclk3", struct omap2_gpif_s, fclk[3]), - DEFINE_PROP_PTR("fclk4", struct omap2_gpif_s, fclk[4]), - DEFINE_PROP_PTR("fclk5", struct omap2_gpif_s, fclk[5]), DEFINE_PROP_END_OF_LIST(), }; diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index 39a295ba20..6be386d0e2 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -77,6 +77,16 @@ typedef struct omap_intr_handler_s omap_intr_handler; /* * TODO: Ideally we should have a clock framework that * let us wire these clocks up with QOM properties or links. + * + * qdev should support a generic means of defining a 'port' with + * an arbitrary interface for connecting two devices. Then we + * could reframe the omap clock API in terms of clock ports, + * and get some type safety. For now the best qdev provides is + * passing an arbitrary pointer. + * (It's not possible to pass in the string which is the clock + * name, because this device does not have the necessary information + * (ie the struct omap_mpu_state_s*) to do the clockname to pointer + * translation.) */ void omap_intc_set_iclk(omap_intr_handler *intc, omap_clk clk); void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk); @@ -87,13 +97,28 @@ void omap_intc_set_fclk(omap_intr_handler *intc, omap_clk clk); typedef struct OMAPI2CState OMAPI2CState; -/* - * TODO: Ideally we should have a clock framework that - * let us wire these clocks up with QOM properties or links. - */ +/* TODO: clock framework (see above) */ void omap_i2c_set_iclk(OMAPI2CState *i2c, omap_clk clk); void omap_i2c_set_fclk(OMAPI2CState *i2c, omap_clk clk); +/* omap_gpio.c */ +#define TYPE_OMAP1_GPIO "omap-gpio" +#define OMAP1_GPIO(obj) \ + OBJECT_CHECK(struct omap_gpif_s, (obj), TYPE_OMAP1_GPIO) + +#define TYPE_OMAP2_GPIO "omap2-gpio" +#define OMAP2_GPIO(obj) \ + OBJECT_CHECK(struct omap2_gpif_s, (obj), TYPE_OMAP2_GPIO) + +typedef struct omap_gpif_s omap_gpif; +typedef struct omap2_gpif_s omap2_gpif; + +/* TODO: clock framework (see above) */ +void omap_gpio_set_clk(omap_gpif *gpio, omap_clk clk); + +void omap2_gpio_set_iclk(omap2_gpif *gpio, omap_clk clk); +void omap2_gpio_set_fclk(omap2_gpif *gpio, uint8_t i, omap_clk clk); + /* OMAP2 l4 Interconnect */ struct omap_l4_s; struct omap_l4_region_s { From 5c4d910f2d5bbf28c44e0f4dad1857c2cd9f77f4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 15:52:40 +0200 Subject: [PATCH 35/37] qdev: remove PROP_MEMORY_REGION MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit PROP_MEMORY_REGION was a derivative of PROP_PTR, added in commit ed03d749f3f513b8fb0287757cfda2cb6825f063 (qdev: add MemoryRegion property) and thankfully no longer needed since commit 3eff40dbf44896a8180c86c84dbdefb2eb173fbe (hw/misc: Remove mmio_interface device). Signed-off-by: Marc-André Lureau Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- include/hw/qdev-properties.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h index c6a8cb5516..16837ab5dd 100644 --- a/include/hw/qdev-properties.h +++ b/include/hw/qdev-properties.h @@ -216,8 +216,6 @@ extern const PropertyInfo qdev_prop_pcie_link_width; DEFINE_PROP_UNSIGNED(_n, _s, _f, 0, qdev_prop_blocksize, uint16_t) #define DEFINE_PROP_PCI_HOST_DEVADDR(_n, _s, _f) \ DEFINE_PROP(_n, _s, _f, qdev_prop_pci_host_devaddr, PCIHostDeviceAddress) -#define DEFINE_PROP_MEMORY_REGION(_n, _s, _f) \ - DEFINE_PROP(_n, _s, _f, qdev_prop_ptr, MemoryRegion *) #define DEFINE_PROP_OFF_AUTO_PCIBAR(_n, _s, _f, _d) \ DEFINE_PROP_SIGNED(_n, _s, _f, _d, qdev_prop_off_auto_pcibar, \ OffAutoPCIBAR) From 70f3d674bc2daac865fb75878030c063697fd16a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Fri, 18 Oct 2019 15:50:10 +0200 Subject: [PATCH 36/37] qdev: remove QDEV_PROP_PTR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No longer used in the tree. The comment about user_creatable is still quite relevant, but there is already a similar comment in qdev-core.h. Reviewed-by: Peter Maydell Signed-off-by: Marc-André Lureau --- hw/core/qdev-properties.c | 18 ------------------ include/hw/qdev-properties.h | 22 ---------------------- 2 files changed, 40 deletions(-) diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index ac28890e5a..6ca7697599 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -501,13 +501,6 @@ const PropertyInfo qdev_prop_string = { .set = set_string, }; -/* --- pointer --- */ - -/* Not a proper property, just for dirty hacks. TODO Remove it! */ -const PropertyInfo qdev_prop_ptr = { - .name = "ptr", -}; - /* --- mac address --- */ /* @@ -1165,17 +1158,6 @@ void qdev_prop_set_enum(DeviceState *dev, const char *name, int value) name, &error_abort); } -void qdev_prop_set_ptr(DeviceState *dev, const char *name, void *value) -{ - Property *prop; - void **ptr; - - prop = qdev_prop_find(dev, name); - assert(prop && prop->info == &qdev_prop_ptr); - ptr = qdev_get_prop_ptr(dev, prop); - *ptr = value; -} - static GPtrArray *global_props(void) { static GPtrArray *gp; diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h index 16837ab5dd..a90a9cec80 100644 --- a/include/hw/qdev-properties.h +++ b/include/hw/qdev-properties.h @@ -18,7 +18,6 @@ extern const PropertyInfo qdev_prop_size; extern const PropertyInfo qdev_prop_string; extern const PropertyInfo qdev_prop_chr; extern const PropertyInfo qdev_prop_tpm; -extern const PropertyInfo qdev_prop_ptr; extern const PropertyInfo qdev_prop_macaddr; extern const PropertyInfo qdev_prop_on_off_auto; extern const PropertyInfo qdev_prop_losttickpolicy; @@ -171,25 +170,6 @@ extern const PropertyInfo qdev_prop_pcie_link_width; #define DEFINE_PROP_PCI_DEVFN(_n, _s, _f, _d) \ DEFINE_PROP_SIGNED(_n, _s, _f, _d, qdev_prop_pci_devfn, int32_t) -/* - * Please avoid pointer properties. If you must use them, you must - * cover them in their device's class init function as follows: - * - * - If the property must be set, the device cannot be used with - * device_add, so add code like this: - * |* Reason: pointer property "NAME-OF-YOUR-PROP" *| - * DeviceClass *dc = DEVICE_CLASS(class); - * dc->user_creatable = false; - * - * - If the property may safely remain null, document it like this: - * |* - * * Note: pointer property "interrupt_vector" may remain null, thus - * * no need for dc->user_creatable = false; - * *| - */ -#define DEFINE_PROP_PTR(_n, _s, _f) \ - DEFINE_PROP(_n, _s, _f, qdev_prop_ptr, void*) - #define DEFINE_PROP_CHR(_n, _s, _f) \ DEFINE_PROP(_n, _s, _f, qdev_prop_chr, CharBackend) #define DEFINE_PROP_STRING(_n, _s, _f) \ @@ -262,8 +242,6 @@ void qdev_prop_set_drive(DeviceState *dev, const char *name, void qdev_prop_set_macaddr(DeviceState *dev, const char *name, const uint8_t *value); void qdev_prop_set_enum(DeviceState *dev, const char *name, int value); -/* FIXME: Remove opaque pointer properties. */ -void qdev_prop_set_ptr(DeviceState *dev, const char *name, void *value); void qdev_prop_register_global(GlobalProperty *prop); int qdev_prop_check_globals(void); From f0d753b1c1e6c334cd089be97a0eb9f1bc415559 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Date: Sat, 26 Oct 2019 22:55:46 +0200 Subject: [PATCH 37/37] qdev/qom: remove some TODO limitations now that PROP_PTR is gone MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Marc-André Lureau Reviewed-by: Markus Armbruster --- hw/core/qdev.c | 8 -------- qom/qom-qmp-cmds.c | 10 ---------- 2 files changed, 18 deletions(-) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index aa3ccbf2ec..9f1753f5cf 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -736,14 +736,6 @@ void qdev_property_add_static(DeviceState *dev, Property *prop, if (prop->info->create) { prop->info->create(obj, prop, &local_err); } else { - /* - * TODO qdev_prop_ptr does not have getters or setters. It must - * go now that it can be replaced with links. The test should be - * removed along with it: all static properties are read/write. - */ - if (!prop->info->get && !prop->info->set) { - return; - } object_property_add(obj, prop->name, prop->info->name, prop->info->get, prop->info->set, prop->info->release, diff --git a/qom/qom-qmp-cmds.c b/qom/qom-qmp-cmds.c index 236e8e41dd..f4494f98ac 100644 --- a/qom/qom-qmp-cmds.c +++ b/qom/qom-qmp-cmds.c @@ -142,16 +142,6 @@ static ObjectPropertyInfo *make_device_property_info(ObjectClass *klass, continue; } - /* - * TODO Properties without a parser are just for dirty hacks. - * qdev_prop_ptr is the only such PropertyInfo. It's marked - * for removal. This conditional should be removed along with - * it. - */ - if (!prop->info->set && !prop->info->create) { - return NULL; /* no way to set it, don't show */ - } - info = g_malloc0(sizeof(*info)); info->name = g_strdup(prop->name); info->type = default_type ? g_strdup(default_type)