From 1b7d17cae4c31e7cf16abd7036f5a5ca5dee8c57 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Wed, 27 Jul 2016 16:56:29 +1000 Subject: [PATCH] ppc: FP exceptions are always precise We don't implement imprecise FP exceptions and using store_current which sets SRR1 to the *previous* instruction never makes sense for these. So let's be truthful and make them precise, which is allowed by the architecture. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: David Gibson --- target-ppc/excp_helper.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index 96c6fd9eb0..02d9e79e79 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -274,12 +274,13 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) env->error_code = 0; return; } + + /* FP exceptions always have NIP pointing to the faulting + * instruction, so always use store_next and claim we are + * precise in the MSR. + */ msr |= 0x00100000; - if (msr_fe0 == msr_fe1) { - goto store_next; - } - msr |= 0x00010000; - break; + goto store_next; case POWERPC_EXCP_INVAL: LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip); msr |= 0x00080000;