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intel_iommu: fix several incorrect endianess and bit fields 

Signed-off-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Peter Xu 2016-10-31 15:34:38 +08:00 committed by Michael S. Tsirkin
parent 6e724d9d99
commit 1a43713b02
2 changed files with 5 additions and 6 deletions
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2
hw/i386/intel_iommu.c
View File

@ -2180,7 +2180,7 @@ static int vtd_interrupt_remap_msi(IntelIOMMUState *iommu,
}
addr.data = origin->address & VTD_MSI_ADDR_LO_MASK;
if (le16_to_cpu(addr.addr.__head) != 0xfee) {
if (addr.addr.__head != 0xfee) {
VTD_DPRINTF(GENERAL, "error: MSI addr low 32 bits invalid: "
"0x%"PRIx32, addr.data);
return -VTD_FR_IR_REQ_RSVD;

9
include/hw/i386/intel_iommu.h
View File

@ -123,7 +123,6 @@ enum {
union VTD_IR_TableEntry {
struct {
#ifdef HOST_WORDS_BIGENDIAN
uint32_t dest_id:32; /* Destination ID */
uint32_t __reserved_1:8; /* Reserved 1 */
uint32_t vector:8; /* Interrupt Vector */
uint32_t irte_mode:1; /* IRTE Mode */
@ -147,9 +146,9 @@ union VTD_IR_TableEntry {
uint32_t irte_mode:1; /* IRTE Mode */
uint32_t vector:8; /* Interrupt Vector */
uint32_t __reserved_1:8; /* Reserved 1 */
uint32_t dest_id:32; /* Destination ID */
#endif
uint16_t source_id:16; /* Source-ID */
uint32_t dest_id; /* Destination ID */
uint16_t source_id; /* Source-ID */
#ifdef HOST_WORDS_BIGENDIAN
uint64_t __reserved_2:44; /* Reserved 2 */
uint64_t sid_vtype:2; /* Source-ID Validation Type */
@ -220,7 +219,7 @@ struct VTD_MSIMessage {
uint32_t dest:8;
uint32_t __addr_head:12; /* 0xfee */
#endif
uint32_t __addr_hi:32;
uint32_t __addr_hi;
} QEMU_PACKED;
uint64_t msi_addr;
};
@ -239,7 +238,7 @@ struct VTD_MSIMessage {
uint16_t level:1;
uint16_t trigger_mode:1;
#endif
uint16_t __resved1:16;
uint16_t __resved1;
} QEMU_PACKED;
uint32_t msi_data;
};