mirror of https://github.com/xemu-project/xemu.git
target/arm: Use tcg_constant in handle_msr_i
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20220426163043.100432-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1615,7 +1615,6 @@ static void gen_axflag(void)
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static void handle_msr_i(DisasContext *s, uint32_t insn,
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unsigned int op1, unsigned int op2, unsigned int crm)
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{
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TCGv_i32 t1;
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int op = op1 << 3 | op2;
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/* End the TB by default, chaining is ok. */
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@ -1674,9 +1673,7 @@ static void handle_msr_i(DisasContext *s, uint32_t insn,
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if (s->current_el == 0) {
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goto do_unallocated;
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}
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t1 = tcg_const_i32(crm & PSTATE_SP);
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gen_helper_msr_i_spsel(cpu_env, t1);
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tcg_temp_free_i32(t1);
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gen_helper_msr_i_spsel(cpu_env, tcg_constant_i32(crm & PSTATE_SP));
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break;
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case 0x19: /* SSBS */
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@ -1704,15 +1701,11 @@ static void handle_msr_i(DisasContext *s, uint32_t insn,
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break;
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case 0x1e: /* DAIFSet */
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t1 = tcg_const_i32(crm);
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gen_helper_msr_i_daifset(cpu_env, t1);
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tcg_temp_free_i32(t1);
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gen_helper_msr_i_daifset(cpu_env, tcg_constant_i32(crm));
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break;
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case 0x1f: /* DAIFClear */
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t1 = tcg_const_i32(crm);
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gen_helper_msr_i_daifclear(cpu_env, t1);
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tcg_temp_free_i32(t1);
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gen_helper_msr_i_daifclear(cpu_env, tcg_constant_i32(crm));
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/* For DAIFClear, exit the cpu loop to re-evaluate pending IRQs. */
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s->base.is_jmp = DISAS_UPDATE_EXIT;
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break;
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