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Don't use T2 for INS, it conflicts with branch delay slot handling. 

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2674 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2007-04-15 21:26:37 +00:00
parent 80c27194a7
commit 171b31e7c7
2 changed files with 6 additions and 6 deletions
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4
target-mips/op.c
View File

@ -2234,7 +2234,7 @@ void op_ins(void)
unsigned int size = PARAM2;
target_ulong mask = ((size < 32) ? ((1 << size) - 1) : ~0) << pos;
T0 = (T2 & ~mask) | (((uint32_t)T1 << pos) & mask);
T0 = (T0 & ~mask) | (((uint32_t)T1 << pos) & mask);
RETURN();
}
@ -2260,7 +2260,7 @@ void op_dins(void)
unsigned int size = PARAM2;
target_ulong mask = ((size < 32) ? ((1 << size) - 1) : ~0) << pos;
T0 = (T2 & ~mask) | ((T1 << pos) & mask);
T0 = (T0 & ~mask) | ((T1 << pos) & mask);
RETURN();
}

8
target-mips/translate.c
View File

@ -1722,25 +1722,25 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt,
case OPC_INS:
if (lsb > msb)
goto fail;
GEN_LOAD_REG_TN(T2, rt);
GEN_LOAD_REG_TN(T0, rt);
gen_op_ins(lsb, msb - lsb + 1);
break;
case OPC_DINSM:
if (lsb > msb)
goto fail;
GEN_LOAD_REG_TN(T2, rt);
GEN_LOAD_REG_TN(T0, rt);
gen_op_ins(lsb, msb - lsb + 1 + 32);
break;
case OPC_DINSU:
if (lsb > msb)
goto fail;
GEN_LOAD_REG_TN(T2, rt);
GEN_LOAD_REG_TN(T0, rt);
gen_op_ins(lsb + 32, msb - lsb + 1);
break;
case OPC_DINS:
if (lsb > msb)
goto fail;
GEN_LOAD_REG_TN(T2, rt);
GEN_LOAD_REG_TN(T0, rt);
gen_op_ins(lsb, msb - lsb + 1);
break;
default: