mirror of https://github.com/xemu-project/xemu.git
target-xtensa: fix gdb register map construction
Due to different gdb overlay organization between windowed/call0 configurations core import script doesn't always work correctly. Simplify the script: always copy complete gdb register map from overlay, count registers at core registerstion time. Update existing cores. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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ddd44279fd
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1479073b7e
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@ -33,7 +33,7 @@
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#include "core-dc232b/core-isa.h"
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#include "core-dc232b/core-isa.h"
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#include "overlay_tool.h"
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#include "overlay_tool.h"
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static const XtensaConfig dc232b __attribute__((unused)) = {
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static XtensaConfig dc232b __attribute__((unused)) = {
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.name = "dc232b",
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.name = "dc232b",
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.gdb_regmap = {
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.gdb_regmap = {
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.num_regs = 120,
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.num_regs = 120,
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@ -34,7 +34,7 @@
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#include "core-dc233c/core-isa.h"
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#include "core-dc233c/core-isa.h"
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#include "overlay_tool.h"
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#include "overlay_tool.h"
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static const XtensaConfig dc233c __attribute__((unused)) = {
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static XtensaConfig dc233c __attribute__((unused)) = {
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.name = "dc233c",
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.name = "dc233c",
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.gdb_regmap = {
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.gdb_regmap = {
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.num_regs = 121,
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.num_regs = 121,
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@ -33,9 +33,14 @@
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#include "core-fsf/core-isa.h"
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#include "core-fsf/core-isa.h"
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#include "overlay_tool.h"
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#include "overlay_tool.h"
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static const XtensaConfig fsf __attribute__((unused)) = {
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static XtensaConfig fsf __attribute__((unused)) = {
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.name = "fsf",
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.name = "fsf",
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.gdb_regmap = {
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/* GDB for this core is not supported currently */
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/* GDB for this core is not supported currently */
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.reg = {
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XTREG_END
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},
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},
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.clock_freq_khz = 10000,
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.clock_freq_khz = 10000,
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DEFAULT_SECTIONS
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DEFAULT_SECTIONS
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};
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};
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@ -400,6 +400,7 @@ XtensaCPU *cpu_xtensa_init(const char *cpu_model);
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void xtensa_translate_init(void);
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void xtensa_translate_init(void);
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void xtensa_breakpoint_handler(CPUState *cs);
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void xtensa_breakpoint_handler(CPUState *cs);
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int cpu_xtensa_exec(CPUXtensaState *s);
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int cpu_xtensa_exec(CPUXtensaState *s);
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void xtensa_finalize_config(XtensaConfig *config);
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void xtensa_register_core(XtensaConfigList *node);
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void xtensa_register_core(XtensaConfigList *node);
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void check_interrupts(CPUXtensaState *s);
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void check_interrupts(CPUXtensaState *s);
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void xtensa_irq_init(CPUXtensaState *env);
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void xtensa_irq_init(CPUXtensaState *env);
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@ -51,6 +51,20 @@ static void xtensa_core_class_init(ObjectClass *oc, void *data)
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cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
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cc->gdb_num_core_regs = config->gdb_regmap.num_regs;
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}
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}
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void xtensa_finalize_config(XtensaConfig *config)
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{
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unsigned i, n = 0;
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if (config->gdb_regmap.num_regs) {
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return;
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}
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for (i = 0; config->gdb_regmap.reg[i].targno >= 0; ++i) {
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n += (config->gdb_regmap.reg[i].type != 6);
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}
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config->gdb_regmap.num_regs = n;
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}
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void xtensa_register_core(XtensaConfigList *node)
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void xtensa_register_core(XtensaConfigList *node)
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{
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{
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TypeInfo type = {
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TypeInfo type = {
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@ -22,8 +22,7 @@ mkdir -p "$TARGET"
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tar -xf "$OVERLAY" -C "$TARGET" --strip-components=1 \
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tar -xf "$OVERLAY" -C "$TARGET" --strip-components=1 \
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--xform='s/core/core-isa/' config/core.h
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--xform='s/core/core-isa/' config/core.h
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tar -xf "$OVERLAY" -O gdb/xtensa-config.c | \
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tar -xf "$OVERLAY" -O gdb/xtensa-config.c | \
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sed -n '1,/*\//p;/pc/,/a15/p' > "$TARGET"/gdb-config.c
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sed -n '1,/*\//p;/XTREG/,/XTREG_END/p' > "$TARGET"/gdb-config.c
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NUM_REGS=$(grep XTREG "$TARGET"/gdb-config.c | wc -l)
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cat <<EOF > "${TARGET}.c"
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cat <<EOF > "${TARGET}.c"
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#include "cpu.h"
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#include "cpu.h"
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@ -34,10 +33,9 @@ cat <<EOF > "${TARGET}.c"
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#include "core-$NAME/core-isa.h"
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#include "core-$NAME/core-isa.h"
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#include "overlay_tool.h"
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#include "overlay_tool.h"
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static const XtensaConfig $NAME __attribute__((unused)) = {
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static XtensaConfig $NAME __attribute__((unused)) = {
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.name = "$NAME",
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.name = "$NAME",
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.gdb_regmap = {
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.gdb_regmap = {
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.num_regs = $NUM_REGS,
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.reg = {
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.reg = {
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#include "core-$NAME/gdb-config.c"
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#include "core-$NAME/gdb-config.c"
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}
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}
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@ -28,6 +28,7 @@
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#define XTREG(idx, ofs, bi, sz, al, no, flags, cp, typ, grp, name, \
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#define XTREG(idx, ofs, bi, sz, al, no, flags, cp, typ, grp, name, \
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a1, a2, a3, a4, a5, a6) \
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a1, a2, a3, a4, a5, a6) \
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{ .targno = (no), .type = (typ), .group = (grp), .size = (sz) },
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{ .targno = (no), .type = (typ), .group = (grp), .size = (sz) },
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#define XTREG_END { .targno = -1 },
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#ifndef XCHAL_HAVE_DIV32
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#ifndef XCHAL_HAVE_DIV32
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#define XCHAL_HAVE_DIV32 0
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#define XCHAL_HAVE_DIV32 0
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@ -316,6 +317,7 @@
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static XtensaConfigList node = { \
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static XtensaConfigList node = { \
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.config = &core, \
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.config = &core, \
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}; \
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}; \
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xtensa_finalize_config(&core); \
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xtensa_register_core(&node); \
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xtensa_register_core(&node); \
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}
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}
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#else
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#else
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