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target-arm: A64: Add opcode comments to disas_simd_three_reg_diff 

The opcode switch in disas_simd_three_reg_diff() is missing the
customary comments indicating which cases correspond to which
instructions. Add them.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Peter Maydell 2014-02-20 10:35:55 +00:00
parent d324b36ad9
commit 13caf1fd2b
1 changed files with 11 additions and 11 deletions
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22
target-arm/translate-a64.c
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@ -7091,24 +7091,24 @@ static void disas_simd_three_reg_diff(DisasContext *s, uint32_t insn)
/* 128 x 128 -> 64 */ /* 128 x 128 -> 64 */
unsupported_encoding(s, insn); unsupported_encoding(s, insn);
break; break;
case 9: case 9: /* SQDMLAL, SQDMLAL2 */
case 11: case 11: /* SQDMLSL, SQDMLSL2 */
case 13: case 13: /* SQDMULL, SQDMULL2 */
case 14: case 14: /* PMULL, PMULL2 */
if (is_u) { if (is_u) {
unallocated_encoding(s); unallocated_encoding(s);
return; return;
} }
/* fall through */ /* fall through */
case 0: case 0: /* SADDL, SADDL2, UADDL, UADDL2 */
case 2: case 2: /* SSUBL, SSUBL2, USUBL, USUBL2 */
unsupported_encoding(s, insn); unsupported_encoding(s, insn);
break; break;
case 5: case 5: /* SABAL, SABAL2, UABAL, UABAL2 */
case 7: case 7: /* SABDL, SABDL2, UABDL, UABDL2 */
case 8: case 8: /* SMLAL, SMLAL2, UMLAL, UMLAL2 */
case 10: case 10: /* SMLSL, SMLSL2, UMLSL, UMLSL2 */
case 12: case 12: /* SMULL, SMULL2, UMULL, UMULL2 */
/* 64 x 64 -> 128 */ /* 64 x 64 -> 128 */
if (size == 3) { if (size == 3) {
unallocated_encoding(s); unallocated_encoding(s);