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target/riscv: Add a property to set vl to ceil(AVL/2) 

RVV spec allows implementations to set vl with values within
[ceil(AVL/2),VLMAX] when VLMAX < AVL < 2*VLMAX. This commit adds a
property "rvv_vl_half_avl" to enable setting vl = ceil(AVL/2). This
behavior helps identify compiler issues and bugs.

Signed-off-by: Jason Chien <jason.chien@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Message-ID: <20240722175004.23666-1-jason.chien@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Jason Chien 2024-07-23 01:50:04 +08:00 committed by Alistair Francis
parent 718780d204
commit 12f1e2ec00
3 changed files with 4 additions and 0 deletions
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1
target/riscv/cpu.c
View File

@ -2661,6 +2661,7 @@ static Property riscv_cpu_properties[] = {
DEFINE_PROP_BOOL("rvv_ta_all_1s", RISCVCPU, cfg.rvv_ta_all_1s, false),
DEFINE_PROP_BOOL("rvv_ma_all_1s", RISCVCPU, cfg.rvv_ma_all_1s, false),
DEFINE_PROP_BOOL("rvv_vl_half_avl", RISCVCPU, cfg.rvv_vl_half_avl, false),
/*
* write_misa() is marked as experimental for now so mark

1
target/riscv/cpu_cfg.h
View File

@ -127,6 +127,7 @@ struct RISCVCPUConfig {
bool ext_smepmp;
bool rvv_ta_all_1s;
bool rvv_ma_all_1s;
bool rvv_vl_half_avl;
uint32_t mvendorid;
uint64_t marchid;

2
target/riscv/vector_helper.c
View File

@ -75,6 +75,8 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1,
vlmax = vext_get_vlmax(cpu->cfg.vlenb, vsew, lmul);
if (s1 <= vlmax) {
vl = s1;
} else if (s1 < 2 * vlmax && cpu->cfg.rvv_vl_half_avl) {
vl = (s1 + 1) >> 1;
} else {
vl = vlmax;
}