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target-sh4: fix fldi0/fldi1 

fldi0/fldi1 should be executed as a nop if FPSCR.FR is set instead of
generating an exception. Reported by Laurent Desnogues.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5759 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aurel32 2008-11-20 06:41:29 +00:00
parent 66ba317c90
commit 12d961385b
1 changed files with 2 additions and 4 deletions
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6
target-sh4/translate.c
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@ -1670,15 +1670,13 @@ static void _decode_opc(DisasContext * ctx)
case 0xf08d: /* fldi0 FRn - FPSCR: R[PR] */ case 0xf08d: /* fldi0 FRn - FPSCR: R[PR] */
if (!(ctx->fpscr & FPSCR_PR)) { if (!(ctx->fpscr & FPSCR_PR)) {
tcg_gen_movi_i32(cpu_fregs[FREG(B11_8)], 0); tcg_gen_movi_i32(cpu_fregs[FREG(B11_8)], 0);
return;
} }
break; return;
case 0xf09d: /* fldi1 FRn - FPSCR: R[PR] */ case 0xf09d: /* fldi1 FRn - FPSCR: R[PR] */
if (!(ctx->fpscr & FPSCR_PR)) { if (!(ctx->fpscr & FPSCR_PR)) {
tcg_gen_movi_i32(cpu_fregs[FREG(B11_8)], 0x3f800000); tcg_gen_movi_i32(cpu_fregs[FREG(B11_8)], 0x3f800000);
return;
} }
break; return;
case 0xf0ad: /* fcnvsd FPUL,DRn */ case 0xf0ad: /* fcnvsd FPUL,DRn */
{ {
TCGv_i64 fp = tcg_temp_new_i64(); TCGv_i64 fp = tcg_temp_new_i64();