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hw/arm/mps2-tz: Make number of IRQs board-specific 

The AN524 has more interrupt lines than the AN505 and AN521; make
numirq board-specific rather than a compile-time constant.

Since the difference is small (92 on the current boards and 95 on the
new one) we don't dynamically allocate the cpu_irq_splitter[] array
but leave it as a fixed length array whose size is the maximum needed
for any of the boards.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210215115138.20465-10-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2021-02-15 11:51:23 +00:00
parent ba94ffd7d1
commit 11e1d41265
1 changed files with 10 additions and 5 deletions
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15
hw/arm/mps2-tz.c
View File

@ -65,7 +65,7 @@
#include "hw/qdev-clock.h" #include "hw/qdev-clock.h"
#include "qom/object.h" #include "qom/object.h"
#define MPS2TZ_NUMIRQ 92 #define MPS2TZ_NUMIRQ_MAX 92
typedef enum MPS2TZFPGAType { typedef enum MPS2TZFPGAType {
FPGA_AN505, FPGA_AN505,
@ -81,6 +81,7 @@ struct MPS2TZMachineClass {
const uint32_t *oscclk; const uint32_t *oscclk;
uint32_t fpgaio_num_leds; /* Number of LEDs in FPGAIO LED0 register */ uint32_t fpgaio_num_leds; /* Number of LEDs in FPGAIO LED0 register */
bool fpgaio_has_switches; /* Does FPGAIO have SWITCH register? */ bool fpgaio_has_switches; /* Does FPGAIO have SWITCH register? */
int numirq; /* Number of external interrupts */
const char *armsse_type; const char *armsse_type;
}; };
@ -105,7 +106,7 @@ struct MPS2TZMachineState {
SplitIRQ sec_resp_splitter; SplitIRQ sec_resp_splitter;
qemu_or_irq uart_irq_orgate; qemu_or_irq uart_irq_orgate;
DeviceState *lan9118; DeviceState *lan9118;
SplitIRQ cpu_irq_splitter[MPS2TZ_NUMIRQ]; SplitIRQ cpu_irq_splitter[MPS2TZ_NUMIRQ_MAX];
Clock *sysclk; Clock *sysclk;
Clock *s32kclk; Clock *s32kclk;
}; };
@ -140,8 +141,9 @@ static qemu_irq get_sse_irq_in(MPS2TZMachineState *mms, int irqno)
{ {
/* Return a qemu_irq which will signal IRQ n to all CPUs in the SSE. */ /* Return a qemu_irq which will signal IRQ n to all CPUs in the SSE. */
MachineClass *mc = MACHINE_GET_CLASS(mms); MachineClass *mc = MACHINE_GET_CLASS(mms);
MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
assert(irqno < MPS2TZ_NUMIRQ); assert(irqno < mmc->numirq);
if (mc->max_cpus > 1) { if (mc->max_cpus > 1) {
return qdev_get_gpio_in(DEVICE(&mms->cpu_irq_splitter[irqno]), 0); return qdev_get_gpio_in(DEVICE(&mms->cpu_irq_splitter[irqno]), 0);
@ -428,7 +430,7 @@ static void mps2tz_common_init(MachineState *machine)
iotkitdev = DEVICE(&mms->iotkit); iotkitdev = DEVICE(&mms->iotkit);
object_property_set_link(OBJECT(&mms->iotkit), "memory", object_property_set_link(OBJECT(&mms->iotkit), "memory",
OBJECT(system_memory), &error_abort); OBJECT(system_memory), &error_abort);
qdev_prop_set_uint32(iotkitdev, "EXP_NUMIRQ", MPS2TZ_NUMIRQ); qdev_prop_set_uint32(iotkitdev, "EXP_NUMIRQ", mmc->numirq);
qdev_connect_clock_in(iotkitdev, "MAINCLK", mms->sysclk); qdev_connect_clock_in(iotkitdev, "MAINCLK", mms->sysclk);
qdev_connect_clock_in(iotkitdev, "S32KCLK", mms->s32kclk); qdev_connect_clock_in(iotkitdev, "S32KCLK", mms->s32kclk);
sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal); sysbus_realize(SYS_BUS_DEVICE(&mms->iotkit), &error_fatal);
@ -439,8 +441,9 @@ static void mps2tz_common_init(MachineState *machine)
* board. If there is only one CPU, we can just wire the device IRQ * board. If there is only one CPU, we can just wire the device IRQ
* directly to the SSE's IRQ input. * directly to the SSE's IRQ input.
*/ */
assert(mmc->numirq <= MPS2TZ_NUMIRQ_MAX);
if (mc->max_cpus > 1) { if (mc->max_cpus > 1) {
for (i = 0; i < MPS2TZ_NUMIRQ; i++) { for (i = 0; i < mmc->numirq; i++) {
char *name = g_strdup_printf("mps2-irq-splitter%d", i); char *name = g_strdup_printf("mps2-irq-splitter%d", i);
SplitIRQ *splitter = &mms->cpu_irq_splitter[i]; SplitIRQ *splitter = &mms->cpu_irq_splitter[i];
@ -693,6 +696,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data)
mmc->len_oscclk = ARRAY_SIZE(an505_oscclk); mmc->len_oscclk = ARRAY_SIZE(an505_oscclk);
mmc->fpgaio_num_leds = 2; mmc->fpgaio_num_leds = 2;
mmc->fpgaio_has_switches = false; mmc->fpgaio_has_switches = false;
mmc->numirq = 92;
mmc->armsse_type = TYPE_IOTKIT; mmc->armsse_type = TYPE_IOTKIT;
} }
@ -713,6 +717,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data)
mmc->len_oscclk = ARRAY_SIZE(an505_oscclk); mmc->len_oscclk = ARRAY_SIZE(an505_oscclk);
mmc->fpgaio_num_leds = 2; mmc->fpgaio_num_leds = 2;
mmc->fpgaio_has_switches = false; mmc->fpgaio_has_switches = false;
mmc->numirq = 92;
mmc->armsse_type = TYPE_SSE200; mmc->armsse_type = TYPE_SSE200;
} }