mirror of https://github.com/xemu-project/xemu.git
Remove IO_MEM_SHIFT
We no longer use any of the lower bits of a ram_addr, so we might as well use them for the io table index. This increases the number of potential I/O handlers by a factor of 8. Signed-off-by: Avi Kivity <avi@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
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75c578dcaa
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11c7ef0c73
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@ -503,7 +503,7 @@ extern int mem_prealloc;
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3 flags. The ROMD code stores the page ram offset in iotlb entry,
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3 flags. The ROMD code stores the page ram offset in iotlb entry,
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so only a limited number of ids are avaiable. */
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so only a limited number of ids are avaiable. */
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#define IO_MEM_NB_ENTRIES (1 << (TARGET_PAGE_BITS - IO_MEM_SHIFT))
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#define IO_MEM_NB_ENTRIES (1 << TARGET_PAGE_BITS)
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/* Flags stored in the low bits of the TLB virtual address. These are
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/* Flags stored in the low bits of the TLB virtual address. These are
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defined so that fast path ram access is all zeros. */
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defined so that fast path ram access is all zeros. */
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@ -107,8 +107,6 @@ void stq_phys(target_phys_addr_t addr, uint64_t val);
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void cpu_physical_memory_write_rom(target_phys_addr_t addr,
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void cpu_physical_memory_write_rom(target_phys_addr_t addr,
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const uint8_t *buf, int len);
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const uint8_t *buf, int len);
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#define IO_MEM_SHIFT 3
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extern struct MemoryRegion io_mem_ram;
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extern struct MemoryRegion io_mem_ram;
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extern struct MemoryRegion io_mem_rom;
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extern struct MemoryRegion io_mem_rom;
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extern struct MemoryRegion io_mem_unassigned;
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extern struct MemoryRegion io_mem_unassigned;
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32
exec.c
32
exec.c
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@ -2096,7 +2096,7 @@ static bool is_romd(ram_addr_t pd)
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MemoryRegion *mr;
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MemoryRegion *mr;
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pd &= ~TARGET_PAGE_MASK;
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pd &= ~TARGET_PAGE_MASK;
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mr = io_mem_region[pd >> IO_MEM_SHIFT];
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mr = io_mem_region[pd];
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return mr->rom_device && mr->readable;
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return mr->rom_device && mr->readable;
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}
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}
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@ -2556,8 +2556,7 @@ void cpu_register_physical_memory_log(MemoryRegionSection *section,
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ram_addr_t orig_memory = p->phys_offset;
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ram_addr_t orig_memory = p->phys_offset;
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target_phys_addr_t start_addr2, end_addr2;
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target_phys_addr_t start_addr2, end_addr2;
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int need_subpage = 0;
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int need_subpage = 0;
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MemoryRegion *mr = io_mem_region[(orig_memory & ~TARGET_PAGE_MASK)
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MemoryRegion *mr = io_mem_region[orig_memory & ~TARGET_PAGE_MASK];
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>> IO_MEM_SHIFT];
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CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2,
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CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2,
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need_subpage);
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need_subpage);
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@ -3378,7 +3377,7 @@ static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
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if ((memory & ~TARGET_PAGE_MASK) == io_mem_ram.ram_addr) {
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if ((memory & ~TARGET_PAGE_MASK) == io_mem_ram.ram_addr) {
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memory = io_mem_subpage_ram.ram_addr;
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memory = io_mem_subpage_ram.ram_addr;
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}
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}
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memory = (memory >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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memory &= IO_MEM_NB_ENTRIES - 1;
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for (; idx <= eidx; idx++) {
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for (; idx <= eidx; idx++) {
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mmio->sub_io_index[idx] = memory;
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mmio->sub_io_index[idx] = memory;
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mmio->region_offset[idx] = region_offset;
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mmio->region_offset[idx] = region_offset;
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@ -3438,14 +3437,13 @@ static int cpu_register_io_memory_fixed(int io_index, MemoryRegion *mr)
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if (io_index == -1)
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if (io_index == -1)
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return io_index;
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return io_index;
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} else {
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} else {
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io_index >>= IO_MEM_SHIFT;
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if (io_index >= IO_MEM_NB_ENTRIES)
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if (io_index >= IO_MEM_NB_ENTRIES)
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return -1;
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return -1;
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}
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}
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io_mem_region[io_index] = mr;
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io_mem_region[io_index] = mr;
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return (io_index << IO_MEM_SHIFT);
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return io_index;
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}
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}
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int cpu_register_io_memory(MemoryRegion *mr)
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int cpu_register_io_memory(MemoryRegion *mr)
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@ -3453,10 +3451,8 @@ int cpu_register_io_memory(MemoryRegion *mr)
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return cpu_register_io_memory_fixed(0, mr);
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return cpu_register_io_memory_fixed(0, mr);
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}
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}
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void cpu_unregister_io_memory(int io_table_address)
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void cpu_unregister_io_memory(int io_index)
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{
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{
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int io_index = io_table_address >> IO_MEM_SHIFT;
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io_mem_region[io_index] = NULL;
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io_mem_region[io_index] = NULL;
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io_mem_used[io_index] = 0;
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io_mem_used[io_index] = 0;
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}
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}
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@ -3568,7 +3564,7 @@ void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
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if (is_write) {
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if (is_write) {
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if ((pd & ~TARGET_PAGE_MASK) != io_mem_ram.ram_addr) {
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if ((pd & ~TARGET_PAGE_MASK) != io_mem_ram.ram_addr) {
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target_phys_addr_t addr1;
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target_phys_addr_t addr1;
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = pd & (IO_MEM_NB_ENTRIES - 1);
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addr1 = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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addr1 = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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/* XXX: could force cpu_single_env to NULL to avoid
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/* XXX: could force cpu_single_env to NULL to avoid
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potential bugs */
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potential bugs */
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@ -3607,7 +3603,7 @@ void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
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if (!is_ram_rom_romd(pd)) {
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if (!is_ram_rom_romd(pd)) {
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target_phys_addr_t addr1;
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target_phys_addr_t addr1;
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/* I/O case */
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/* I/O case */
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = pd & (IO_MEM_NB_ENTRIES - 1);
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addr1 = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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addr1 = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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if (l >= 4 && ((addr1 & 3) == 0)) {
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if (l >= 4 && ((addr1 & 3) == 0)) {
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/* 32 bit read access */
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/* 32 bit read access */
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@ -3829,7 +3825,7 @@ static inline uint32_t ldl_phys_internal(target_phys_addr_t addr,
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if (!is_ram_rom_romd(pd)) {
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if (!is_ram_rom_romd(pd)) {
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/* I/O case */
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/* I/O case */
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = pd & (IO_MEM_NB_ENTRIES - 1);
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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val = io_mem_read(io_index, addr, 4);
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val = io_mem_read(io_index, addr, 4);
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#if defined(TARGET_WORDS_BIGENDIAN)
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#if defined(TARGET_WORDS_BIGENDIAN)
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@ -3890,7 +3886,7 @@ static inline uint64_t ldq_phys_internal(target_phys_addr_t addr,
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if (!is_ram_rom_romd(pd)) {
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if (!is_ram_rom_romd(pd)) {
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/* I/O case */
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/* I/O case */
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = pd & (IO_MEM_NB_ENTRIES - 1);
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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/* XXX This is broken when device endian != cpu endian.
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/* XXX This is broken when device endian != cpu endian.
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@ -3959,7 +3955,7 @@ static inline uint32_t lduw_phys_internal(target_phys_addr_t addr,
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if (!is_ram_rom_romd(pd)) {
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if (!is_ram_rom_romd(pd)) {
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/* I/O case */
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/* I/O case */
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = pd & (IO_MEM_NB_ENTRIES - 1);
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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val = io_mem_read(io_index, addr, 2);
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val = io_mem_read(io_index, addr, 2);
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#if defined(TARGET_WORDS_BIGENDIAN)
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#if defined(TARGET_WORDS_BIGENDIAN)
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@ -4019,7 +4015,7 @@ void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val)
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pd = p.phys_offset;
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pd = p.phys_offset;
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if ((pd & ~TARGET_PAGE_MASK) != io_mem_ram.ram_addr) {
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if ((pd & ~TARGET_PAGE_MASK) != io_mem_ram.ram_addr) {
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = pd & (IO_MEM_NB_ENTRIES - 1);
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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io_mem_write(io_index, addr, val, 4);
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io_mem_write(io_index, addr, val, 4);
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} else {
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} else {
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@ -4050,7 +4046,7 @@ void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val)
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pd = p.phys_offset;
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pd = p.phys_offset;
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if ((pd & ~TARGET_PAGE_MASK) != io_mem_ram.ram_addr) {
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if ((pd & ~TARGET_PAGE_MASK) != io_mem_ram.ram_addr) {
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = pd & (IO_MEM_NB_ENTRIES - 1);
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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#ifdef TARGET_WORDS_BIGENDIAN
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#ifdef TARGET_WORDS_BIGENDIAN
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io_mem_write(io_index, addr, val >> 32, 4);
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io_mem_write(io_index, addr, val >> 32, 4);
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@ -4079,7 +4075,7 @@ static inline void stl_phys_internal(target_phys_addr_t addr, uint32_t val,
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pd = p.phys_offset;
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pd = p.phys_offset;
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if ((pd & ~TARGET_PAGE_MASK) != io_mem_ram.ram_addr) {
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if ((pd & ~TARGET_PAGE_MASK) != io_mem_ram.ram_addr) {
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = pd & (IO_MEM_NB_ENTRIES - 1);
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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#if defined(TARGET_WORDS_BIGENDIAN)
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#if defined(TARGET_WORDS_BIGENDIAN)
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if (endian == DEVICE_LITTLE_ENDIAN) {
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if (endian == DEVICE_LITTLE_ENDIAN) {
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@ -4152,7 +4148,7 @@ static inline void stw_phys_internal(target_phys_addr_t addr, uint32_t val,
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pd = p.phys_offset;
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pd = p.phys_offset;
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if ((pd & ~TARGET_PAGE_MASK) != io_mem_ram.ram_addr) {
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if ((pd & ~TARGET_PAGE_MASK) != io_mem_ram.ram_addr) {
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io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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io_index = pd & (IO_MEM_NB_ENTRIES - 1);
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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addr = (addr & ~TARGET_PAGE_MASK) + p.region_offset;
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#if defined(TARGET_WORDS_BIGENDIAN)
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#if defined(TARGET_WORDS_BIGENDIAN)
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if (endian == DEVICE_LITTLE_ENDIAN) {
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if (endian == DEVICE_LITTLE_ENDIAN) {
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@ -63,7 +63,7 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr,
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{
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{
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DATA_TYPE res;
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DATA_TYPE res;
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int index;
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int index;
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index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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index = physaddr & (IO_MEM_NB_ENTRIES - 1);
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physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
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physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
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env->mem_io_pc = (unsigned long)retaddr;
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env->mem_io_pc = (unsigned long)retaddr;
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if (index != io_mem_ram.ram_addr && index != io_mem_rom.ram_addr
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if (index != io_mem_ram.ram_addr && index != io_mem_rom.ram_addr
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@ -208,7 +208,7 @@ static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr,
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void *retaddr)
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void *retaddr)
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{
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{
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int index;
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int index;
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index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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index = physaddr & (IO_MEM_NB_ENTRIES - 1);
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physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
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physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
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if (index != io_mem_ram.ram_addr && index != io_mem_rom.ram_addr
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if (index != io_mem_ram.ram_addr && index != io_mem_rom.ram_addr
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&& index != io_mem_unassigned.ram_addr
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&& index != io_mem_unassigned.ram_addr
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