mirror of https://github.com/xemu-project/xemu.git
hw/acpi/aml-build: Improve scalability of PPTT generation
Use g_queue APIs to reduce the nested loops and code indentation with the processor hierarchy levels increasing. Consenquently, it's more scalable to add new topology level to build_pptt. No functional change intended. Signed-off-by: Yanan Wang <wangyanan55@huawei.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 20220107083232.16256-4-wangyanan55@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -2001,7 +2001,10 @@ static void build_processor_hierarchy_node(GArray *tbl, uint32_t flags,
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void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms,
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const char *oem_id, const char *oem_table_id)
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{
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int pptt_start = table_data->len;
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GQueue *list = g_queue_new();
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guint pptt_start = table_data->len;
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guint parent_offset;
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guint length, i;
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int uid = 0;
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int socket;
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AcpiTable table = { .sig = "PPTT", .rev = 2,
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@ -2010,9 +2013,8 @@ void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms,
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acpi_table_begin(&table, table_data);
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for (socket = 0; socket < ms->smp.sockets; socket++) {
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uint32_t socket_offset = table_data->len - pptt_start;
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int core;
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g_queue_push_tail(list,
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GUINT_TO_POINTER(table_data->len - pptt_start));
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build_processor_hierarchy_node(
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table_data,
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/*
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@ -2021,35 +2023,47 @@ void build_pptt(GArray *table_data, BIOSLinker *linker, MachineState *ms,
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*/
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(1 << 0),
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0, socket, NULL, 0);
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}
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length = g_queue_get_length(list);
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for (i = 0; i < length; i++) {
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int core;
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parent_offset = GPOINTER_TO_UINT(g_queue_pop_head(list));
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for (core = 0; core < ms->smp.cores; core++) {
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uint32_t core_offset = table_data->len - pptt_start;
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int thread;
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if (ms->smp.threads > 1) {
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g_queue_push_tail(list,
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GUINT_TO_POINTER(table_data->len - pptt_start));
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build_processor_hierarchy_node(
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table_data,
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(0 << 0), /* not a physical package */
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socket_offset, core, NULL, 0);
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for (thread = 0; thread < ms->smp.threads; thread++) {
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build_processor_hierarchy_node(
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table_data,
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(1 << 1) | /* ACPI Processor ID valid */
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(1 << 2) | /* Processor is a Thread */
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(1 << 3), /* Node is a Leaf */
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core_offset, uid++, NULL, 0);
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}
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parent_offset, core, NULL, 0);
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} else {
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build_processor_hierarchy_node(
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table_data,
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(1 << 1) | /* ACPI Processor ID valid */
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(1 << 3), /* Node is a Leaf */
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socket_offset, uid++, NULL, 0);
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parent_offset, uid++, NULL, 0);
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}
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}
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}
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length = g_queue_get_length(list);
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for (i = 0; i < length; i++) {
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int thread;
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parent_offset = GPOINTER_TO_UINT(g_queue_pop_head(list));
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for (thread = 0; thread < ms->smp.threads; thread++) {
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build_processor_hierarchy_node(
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table_data,
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(1 << 1) | /* ACPI Processor ID valid */
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(1 << 2) | /* Processor is a Thread */
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(1 << 3), /* Node is a Leaf */
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parent_offset, uid++, NULL, 0);
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}
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}
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g_queue_free(list);
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acpi_table_end(linker, &table);
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}
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