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target/ppc: books: Remove excp_model argument from ppc_excp_apply_ail
We don't really need to check for exception model while applying AIL. We can check the lpcr_mask for the presence of LPCR_AIL/LPCR_HAIL. This removes one more instance of passing the exception model ID around. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20220207183036.1507882-5-farosas@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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@ -262,11 +262,10 @@ static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp,
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* | a | h | 11 | 1 | 1 | h |
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* | a | h | 11 | 1 | 1 | h |
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* +--------------------------------------------------------------------+
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* +--------------------------------------------------------------------+
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*/
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*/
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static void ppc_excp_apply_ail(PowerPCCPU *cpu, int excp_model, int excp,
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static void ppc_excp_apply_ail(PowerPCCPU *cpu, int excp, target_ulong msr,
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target_ulong msr,
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target_ulong *new_msr, target_ulong *vector)
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target_ulong *new_msr,
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target_ulong *vector)
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{
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{
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PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
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CPUPPCState *env = &cpu->env;
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CPUPPCState *env = &cpu->env;
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bool mmu_all_on = ((msr >> MSR_IR) & 1) && ((msr >> MSR_DR) & 1);
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bool mmu_all_on = ((msr >> MSR_IR) & 1) && ((msr >> MSR_DR) & 1);
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bool hv_escalation = !(msr & MSR_HVB) && (*new_msr & MSR_HVB);
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bool hv_escalation = !(msr & MSR_HVB) && (*new_msr & MSR_HVB);
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@ -279,8 +278,13 @@ static void ppc_excp_apply_ail(PowerPCCPU *cpu, int excp_model, int excp,
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return;
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return;
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}
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}
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if (excp_model == POWERPC_EXCP_POWER8 ||
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if (!(pcc->lpcr_mask & LPCR_AIL)) {
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excp_model == POWERPC_EXCP_POWER9) {
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/* This CPU does not have AIL */
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return;
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}
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/* P8 & P9 */
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if (!(pcc->lpcr_mask & LPCR_HAIL)) {
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if (!mmu_all_on) {
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if (!mmu_all_on) {
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/* AIL only works if MSR[IR] and MSR[DR] are both enabled. */
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/* AIL only works if MSR[IR] and MSR[DR] are both enabled. */
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return;
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return;
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@ -303,7 +307,8 @@ static void ppc_excp_apply_ail(PowerPCCPU *cpu, int excp_model, int excp,
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return;
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return;
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}
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}
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} else if (excp_model == POWERPC_EXCP_POWER10) {
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/* P10 and up */
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} else {
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if (!mmu_all_on && !hv_escalation) {
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if (!mmu_all_on && !hv_escalation) {
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/*
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/*
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* AIL works for HV interrupts even with guest MSR[IR/DR] disabled.
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* AIL works for HV interrupts even with guest MSR[IR/DR] disabled.
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@ -328,9 +333,6 @@ static void ppc_excp_apply_ail(PowerPCCPU *cpu, int excp_model, int excp,
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/* AIL=1 and AIL=2 are reserved, treat them like AIL=0 */
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/* AIL=1 and AIL=2 are reserved, treat them like AIL=0 */
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return;
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return;
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}
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}
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} else {
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/* Other processors do not support AIL */
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return;
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}
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}
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/*
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/*
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@ -1280,7 +1282,6 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
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{
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{
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CPUState *cs = CPU(cpu);
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CPUState *cs = CPU(cpu);
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CPUPPCState *env = &cpu->env;
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CPUPPCState *env = &cpu->env;
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int excp_model = env->excp_model;
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target_ulong msr, new_msr, vector;
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target_ulong msr, new_msr, vector;
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int srr0, srr1, lev = -1;
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int srr0, srr1, lev = -1;
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@ -1551,7 +1552,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
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}
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}
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/* This can update new_msr and vector if AIL applies */
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/* This can update new_msr and vector if AIL applies */
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ppc_excp_apply_ail(cpu, excp_model, excp, msr, &new_msr, &vector);
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ppc_excp_apply_ail(cpu, excp, msr, &new_msr, &vector);
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powerpc_set_excp_state(cpu, vector, new_msr);
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powerpc_set_excp_state(cpu, vector, new_msr);
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}
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}
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