mirror of https://github.com/xemu-project/xemu.git
exec: Reorganize the GETRA/GETPC macros
Always define GETRA; use __builtin_extract_return_addr, rather than having a special case for s390. Split GETPC_ADJ out of GETPC; use 2 universally, rather than having a special case for arm. Rename GETPC_LDST to GETRA_LDST to indicate that it does not contain the GETPC_ADJ value. Likewise with GETPC_EXT to GETRA_EXT. Perform the GETPC_ADJ adjustment inside helper_ret_ld/st. This will allow backends to pass along the "true" return address rather than the massaged GETPC value. In the meantime, double application of GETPC_ADJ does not hurt, since the call insn in all ISAs is at least 4 bytes long. Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
c72b26ec92
commit
0f842f8a24
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@ -295,47 +295,42 @@ static inline void tb_add_jump(TranslationBlock *tb, int n,
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}
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}
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/* The return address may point to the start of the next instruction.
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Subtracting one gets us the call instruction itself. */
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/* GETRA is the true target of the return instruction that we'll execute,
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defined here for simplicity of defining the follow-up macros. */
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#if defined(CONFIG_TCG_INTERPRETER)
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extern uintptr_t tci_tb_ptr;
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# define GETPC() tci_tb_ptr
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#elif defined(__s390__) && !defined(__s390x__)
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# define GETPC() \
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(((uintptr_t)__builtin_return_address(0) & 0x7fffffffUL) - 1)
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#elif defined(__arm__)
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/* Thumb return addresses have the low bit set, so we need to subtract two.
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This is still safe in ARM mode because instructions are 4 bytes. */
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# define GETPC() ((uintptr_t)__builtin_return_address(0) - 2)
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# define GETRA() tci_tb_ptr
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#else
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# define GETPC() ((uintptr_t)__builtin_return_address(0) - 1)
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# define GETRA() \
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((uintptr_t)__builtin_extract_return_addr(__builtin_return_address(0)))
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#endif
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#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
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/* qemu_ld/st optimization split code generation to fast and slow path, thus,
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it needs special handling for an MMU helper which is called from the slow
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path, to get the fast path's pc without any additional argument.
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It uses a tricky solution which embeds the fast path pc into the slow path.
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/* The true return address will often point to a host insn that is part of
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the next translated guest insn. Adjust the address backward to point to
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the middle of the call insn. Subtracting one would do the job except for
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several compressed mode architectures (arm, mips) which set the low bit
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to indicate the compressed mode; subtracting two works around that. It
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is also the case that there are no host isas that contain a call insn
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smaller than 4 bytes, so we don't worry about special-casing this. */
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#if defined(CONFIG_TCG_INTERPRETER)
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# define GETPC_ADJ 0
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#else
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# define GETPC_ADJ 2
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#endif
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Code flow in slow path:
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(1) pre-process
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(2) call MMU helper
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(3) jump to (5)
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(4) fast path information (implementation specific)
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(5) post-process (e.g. stack adjust)
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(6) jump to corresponding code of the next of fast path
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*/
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# if defined(__i386__) || defined(__x86_64__)
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# define GETPC_EXT() GETPC()
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# elif defined (_ARCH_PPC) && !defined (_ARCH_PPC64)
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# define GETRA() ((uintptr_t)__builtin_return_address(0))
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# define GETPC_LDST() ((uintptr_t) ((*(int32_t *)(GETRA() - 4)) - 1))
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#define GETPC() (GETRA() - GETPC_ADJ)
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/* The LDST optimizations splits code generation into fast and slow path.
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In some implementations, we pass the "logical" return address manually;
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in others, we must infer the logical return from the true return. */
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#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
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# if defined (_ARCH_PPC) && !defined (_ARCH_PPC64)
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# define GETRA_LDST(RA) (*(int32_t *)((RA) - 4))
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# elif defined(__arm__)
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/* We define two insns between the return address and the branch back to
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straight-line. Find and decode that branch insn. */
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# define GETRA() ((uintptr_t)__builtin_return_address(0))
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# define GETPC_LDST() tcg_getpc_ldst(GETRA())
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static inline uintptr_t tcg_getpc_ldst(uintptr_t ra)
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# define GETRA_LDST(RA) tcg_getra_ldst(RA)
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static inline uintptr_t tcg_getra_ldst(uintptr_t ra)
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{
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int32_t b;
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ra += 8; /* skip the two insns */
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@ -343,33 +338,32 @@ static inline uintptr_t tcg_getpc_ldst(uintptr_t ra)
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b = (b << 8) >> (8 - 2); /* extract the displacement */
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ra += 8; /* branches are relative to pc+8 */
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ra += b; /* apply the displacement */
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ra -= 4; /* return a pointer into the current opcode,
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not the start of the next opcode */
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return ra;
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}
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# elif defined(__aarch64__)
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# define GETRA() ((uintptr_t)__builtin_return_address(0))
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# define GETPC_LDST() tcg_getpc_ldst(GETRA())
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static inline uintptr_t tcg_getpc_ldst(uintptr_t ra)
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# define GETRA_LDST(RA) tcg_getra_ldst(RA)
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static inline uintptr_t tcg_getra_ldst(uintptr_t ra)
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{
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int32_t b;
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ra += 4; /* skip one instruction */
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b = *(int32_t *)ra; /* load the branch insn */
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b = (b << 6) >> (6 - 2); /* extract the displacement */
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ra += b; /* apply the displacement */
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ra -= 4; /* return a pointer into the current opcode,
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not the start of the next opcode */
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return ra;
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}
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# else
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# error "CONFIG_QEMU_LDST_OPTIMIZATION needs GETPC_LDST() implementation!"
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# endif
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#endif /* CONFIG_QEMU_LDST_OPTIMIZATION */
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/* ??? Delete these once they are no longer used. */
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bool is_tcg_gen_code(uintptr_t pc_ptr);
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# ifndef GETPC_EXT
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# define GETPC_EXT() (is_tcg_gen_code(GETRA()) ? GETPC_LDST() : GETPC())
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# endif
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#ifdef GETRA_LDST
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# define GETRA_EXT() tcg_getra_ext(GETRA())
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static inline uintptr_t tcg_getra_ext(uintptr_t ra)
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{
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return is_tcg_gen_code(ra) ? GETRA_LDST(ra) : ra;
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}
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#else
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# define GETPC_EXT() GETPC()
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# define GETRA_EXT() GETRA()
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#endif
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#if !defined(CONFIG_USER_ONLY)
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@ -86,6 +86,9 @@ glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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target_ulong tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ;
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uintptr_t haddr;
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/* Adjust the given return address. */
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retaddr -= GETPC_ADJ;
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/* If the TLB entry is for a different page, reload and try again. */
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if ((addr & TARGET_PAGE_MASK)
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!= (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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@ -121,10 +124,12 @@ glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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#endif
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addr1 = addr & ~(DATA_SIZE - 1);
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addr2 = addr1 + DATA_SIZE;
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res1 = glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(env, addr1,
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mmu_idx, retaddr);
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res2 = glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(env, addr2,
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mmu_idx, retaddr);
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/* Note the adjustment at the beginning of the function.
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Undo that for the recursion. */
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res1 = glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)
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(env, addr1, mmu_idx, retaddr + GETPC_ADJ);
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res2 = glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)
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(env, addr2, mmu_idx, retaddr + GETPC_ADJ);
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shift = (addr & (DATA_SIZE - 1)) * 8;
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#ifdef TARGET_WORDS_BIGENDIAN
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res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift));
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@ -150,7 +155,7 @@ glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr,
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int mmu_idx)
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{
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return glue(glue(helper_ret_ld, SUFFIX), MMUSUFFIX)(env, addr, mmu_idx,
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GETPC_EXT());
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GETRA_EXT());
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}
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#ifndef SOFTMMU_CODE_ACCESS
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@ -182,6 +187,9 @@ glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
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uintptr_t haddr;
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/* Adjust the given return address. */
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retaddr -= GETPC_ADJ;
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/* If the TLB entry is for a different page, reload and try again. */
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if ((addr & TARGET_PAGE_MASK)
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!= (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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@ -223,8 +231,10 @@ glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(CPUArchState *env,
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#else
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uint8_t val8 = val >> (i * 8);
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#endif
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/* Note the adjustment at the beginning of the function.
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Undo that for the recursion. */
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glue(helper_ret_stb, MMUSUFFIX)(env, addr + i, val8,
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mmu_idx, retaddr);
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mmu_idx, retaddr + GETPC_ADJ);
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}
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return;
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}
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@ -245,7 +255,7 @@ glue(glue(helper_st, SUFFIX), MMUSUFFIX)(CPUArchState *env, target_ulong addr,
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DATA_TYPE val, int mmu_idx)
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{
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glue(glue(helper_ret_st, SUFFIX), MMUSUFFIX)(env, addr, val, mmu_idx,
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GETPC_EXT());
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GETRA_EXT());
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}
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#endif /* !defined(SOFTMMU_CODE_ACCESS) */
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