mirror of https://github.com/xemu-project/xemu.git
target/ppc: convert vsplt[bhw] to use vector operations
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20190215100058.20015-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -246,9 +246,6 @@ DEF_HELPER_3(vrld, void, avr, avr, avr)
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DEF_HELPER_3(vsl, void, avr, avr, avr)
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DEF_HELPER_3(vsr, void, avr, avr, avr)
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DEF_HELPER_4(vsldoi, void, avr, avr, avr, i32)
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DEF_HELPER_3(vspltb, void, avr, avr, i32)
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DEF_HELPER_3(vsplth, void, avr, avr, i32)
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DEF_HELPER_3(vspltw, void, avr, avr, i32)
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DEF_HELPER_3(vextractub, void, avr, avr, i32)
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DEF_HELPER_3(vextractuh, void, avr, avr, i32)
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DEF_HELPER_3(vextractuw, void, avr, avr, i32)
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@ -1869,25 +1869,6 @@ void helper_vslo(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)
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#endif
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}
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/* Experimental testing shows that hardware masks the immediate. */
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#define _SPLAT_MASKED(element) (splat & (ARRAY_SIZE(r->element) - 1))
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#define SPLAT_ELEMENT(element) _SPLAT_MASKED(element)
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#define VSPLT(suffix, element, access) \
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void helper_vsplt##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \
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{ \
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uint32_t s = b->access(SPLAT_ELEMENT(element)); \
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int i; \
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\
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for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
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r->access(i) = s; \
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} \
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}
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VSPLT(b, u8, VsrB)
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VSPLT(h, u16, VsrH)
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VSPLT(w, u32, VsrW)
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#undef VSPLT
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#undef SPLAT_ELEMENT
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#undef _SPLAT_MASKED
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#if defined(HOST_WORDS_BIGENDIAN)
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#define VINSERT(suffix, element) \
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void helper_vinsert##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t index) \
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@ -798,24 +798,32 @@ GEN_VXFORM_NOA(vprtybw, 1, 24);
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GEN_VXFORM_NOA(vprtybd, 1, 24);
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GEN_VXFORM_NOA(vprtybq, 1, 24);
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#define GEN_VXFORM_UIMM(name, opc2, opc3) \
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static void glue(gen_, name)(DisasContext *ctx) \
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{ \
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TCGv_ptr rb, rd; \
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TCGv_i32 uimm; \
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if (unlikely(!ctx->altivec_enabled)) { \
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gen_exception(ctx, POWERPC_EXCP_VPU); \
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return; \
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} \
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uimm = tcg_const_i32(UIMM5(ctx->opcode)); \
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rb = gen_avr_ptr(rB(ctx->opcode)); \
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rd = gen_avr_ptr(rD(ctx->opcode)); \
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gen_helper_##name (rd, rb, uimm); \
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tcg_temp_free_i32(uimm); \
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tcg_temp_free_ptr(rb); \
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tcg_temp_free_ptr(rd); \
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static void gen_vsplt(DisasContext *ctx, int vece)
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{
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int uimm, dofs, bofs;
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if (unlikely(!ctx->altivec_enabled)) {
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gen_exception(ctx, POWERPC_EXCP_VPU);
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return;
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}
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uimm = UIMM5(ctx->opcode);
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bofs = avr64_offset(rB(ctx->opcode), true);
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dofs = avr64_offset(rD(ctx->opcode), true);
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/* Experimental testing shows that hardware masks the immediate. */
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bofs += (uimm << vece) & 15;
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#ifndef HOST_WORDS_BIGENDIAN
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bofs ^= 15;
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bofs &= ~((1 << vece) - 1);
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#endif
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tcg_gen_gvec_dup_mem(vece, dofs, bofs, 16, 16);
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}
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#define GEN_VXFORM_VSPLT(name, vece, opc2, opc3) \
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static void glue(gen_, name)(DisasContext *ctx) { gen_vsplt(ctx, vece); }
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#define GEN_VXFORM_UIMM_ENV(name, opc2, opc3) \
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static void glue(gen_, name)(DisasContext *ctx) \
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{ \
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@ -858,9 +866,9 @@ static void glue(gen_, name)(DisasContext *ctx) \
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tcg_temp_free_ptr(rd); \
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}
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GEN_VXFORM_UIMM(vspltb, 6, 8);
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GEN_VXFORM_UIMM(vsplth, 6, 9);
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GEN_VXFORM_UIMM(vspltw, 6, 10);
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GEN_VXFORM_VSPLT(vspltb, MO_8, 6, 8);
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GEN_VXFORM_VSPLT(vsplth, MO_16, 6, 9);
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GEN_VXFORM_VSPLT(vspltw, MO_32, 6, 10);
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GEN_VXFORM_UIMM_SPLAT(vextractub, 6, 8, 15);
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GEN_VXFORM_UIMM_SPLAT(vextractuh, 6, 9, 14);
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GEN_VXFORM_UIMM_SPLAT(vextractuw, 6, 10, 12);
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