mirror of https://github.com/xemu-project/xemu.git
ppc: BOOK3E: nothing should be done when MSR:PR is set
The server architecture (BOOK3S) specifies that any instruction that sets MSR:PR will also set MSR:EE, IR and DR. However there is no such behavior specification for the embedded architecture (BOOK3E). Signed-off-by: Vladimir Svoboda <ze.vlad@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
parent
62ef3760d4
commit
0d28aa197d
|
@ -131,11 +131,14 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value,
|
|||
}
|
||||
/* If PR=1 then EE, IR and DR must be 1
|
||||
*
|
||||
* Note: We only enforce this on 64-bit processors. It appears that
|
||||
* 32-bit implementations supports PR=1 and EE/DR/IR=0 and MacOS
|
||||
* exploits it.
|
||||
* Note: We only enforce this on 64-bit server processors.
|
||||
* It appears that:
|
||||
* - 32-bit implementations supports PR=1 and EE/DR/IR=0 and MacOS
|
||||
* exploits it.
|
||||
* - 64-bit embedded implementations do not need any operation to be
|
||||
* performed when PR is set.
|
||||
*/
|
||||
if ((env->insns_flags & PPC_64B) && ((value >> MSR_PR) & 1)) {
|
||||
if ((env->insns_flags & PPC_SEGMENT_64B) && ((value >> MSR_PR) & 1)) {
|
||||
value |= (1 << MSR_EE) | (1 << MSR_DR) | (1 << MSR_IR);
|
||||
}
|
||||
#endif
|
||||
|
|
Loading…
Reference in New Issue