mirror of https://github.com/xemu-project/xemu.git
target/mips: Explicitly set 2-NaN propagation rule
Set the 2-NaN propagation rule explicitly in the float_status words we use. For active_fpu.fp_status, we do this in a new fp_reset() function which mirrors the existing msa_reset() function in doing "first call restore to set the fp status parts that depend on CPU state, then set the fp status parts that are constant". Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241025141254.2141506-5-peter.maydell@linaro.org
This commit is contained in:
parent
d1ff996788
commit
0c587f1339
|
@ -402,24 +402,10 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls,
|
||||||
/* target didn't set the rule: fall back to old ifdef choices */
|
/* target didn't set the rule: fall back to old ifdef choices */
|
||||||
#if defined(TARGET_AVR) || defined(TARGET_HEXAGON) \
|
#if defined(TARGET_AVR) || defined(TARGET_HEXAGON) \
|
||||||
|| defined(TARGET_RISCV) || defined(TARGET_SH4) \
|
|| defined(TARGET_RISCV) || defined(TARGET_SH4) \
|
||||||
|| defined(TARGET_TRICORE) || defined(TARGET_ARM)
|
|| defined(TARGET_TRICORE) || defined(TARGET_ARM) || defined(TARGET_MIPS)
|
||||||
g_assert_not_reached();
|
g_assert_not_reached();
|
||||||
#elif defined(TARGET_MIPS) || defined(TARGET_HPPA) || \
|
#elif defined(TARGET_HPPA) || \
|
||||||
defined(TARGET_LOONGARCH64) || defined(TARGET_S390X)
|
defined(TARGET_LOONGARCH64) || defined(TARGET_S390X)
|
||||||
/*
|
|
||||||
* According to MIPS specifications, if one of the two operands is
|
|
||||||
* a sNaN, a new qNaN has to be generated. This is done in
|
|
||||||
* floatXX_silence_nan(). For qNaN inputs the specifications
|
|
||||||
* says: "When possible, this QNaN result is one of the operand QNaN
|
|
||||||
* values." In practice it seems that most implementations choose
|
|
||||||
* the first operand if both operands are qNaN. In short this gives
|
|
||||||
* the following rules:
|
|
||||||
* 1. A if it is signaling
|
|
||||||
* 2. B if it is signaling
|
|
||||||
* 3. A (quiet)
|
|
||||||
* 4. B (quiet)
|
|
||||||
* A signaling NaN is always silenced before returning it.
|
|
||||||
*/
|
|
||||||
rule = float_2nan_prop_s_ab;
|
rule = float_2nan_prop_s_ab;
|
||||||
#elif defined(TARGET_PPC) || defined(TARGET_M68K)
|
#elif defined(TARGET_PPC) || defined(TARGET_M68K)
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -407,9 +407,9 @@ static void mips_cpu_reset_hold(Object *obj, ResetType type)
|
||||||
}
|
}
|
||||||
|
|
||||||
msa_reset(env);
|
msa_reset(env);
|
||||||
|
fp_reset(env);
|
||||||
|
|
||||||
compute_hflags(env);
|
compute_hflags(env);
|
||||||
restore_fp_status(env);
|
|
||||||
restore_pamask(env);
|
restore_pamask(env);
|
||||||
cs->exception_index = EXCP_NONE;
|
cs->exception_index = EXCP_NONE;
|
||||||
|
|
||||||
|
|
|
@ -44,6 +44,28 @@ static inline void restore_fp_status(CPUMIPSState *env)
|
||||||
restore_snan_bit_mode(env);
|
restore_snan_bit_mode(env);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static inline void fp_reset(CPUMIPSState *env)
|
||||||
|
{
|
||||||
|
restore_fp_status(env);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* According to MIPS specifications, if one of the two operands is
|
||||||
|
* a sNaN, a new qNaN has to be generated. This is done in
|
||||||
|
* floatXX_silence_nan(). For qNaN inputs the specifications
|
||||||
|
* says: "When possible, this QNaN result is one of the operand QNaN
|
||||||
|
* values." In practice it seems that most implementations choose
|
||||||
|
* the first operand if both operands are qNaN. In short this gives
|
||||||
|
* the following rules:
|
||||||
|
* 1. A if it is signaling
|
||||||
|
* 2. B if it is signaling
|
||||||
|
* 3. A (quiet)
|
||||||
|
* 4. B (quiet)
|
||||||
|
* A signaling NaN is always silenced before returning it.
|
||||||
|
*/
|
||||||
|
set_float_2nan_prop_rule(float_2nan_prop_s_ab,
|
||||||
|
&env->active_fpu.fp_status);
|
||||||
|
}
|
||||||
|
|
||||||
/* MSA */
|
/* MSA */
|
||||||
|
|
||||||
enum CPUMIPSMSADataFormat {
|
enum CPUMIPSMSADataFormat {
|
||||||
|
|
|
@ -49,6 +49,23 @@ void msa_reset(CPUMIPSState *env)
|
||||||
set_float_detect_tininess(float_tininess_after_rounding,
|
set_float_detect_tininess(float_tininess_after_rounding,
|
||||||
&env->active_tc.msa_fp_status);
|
&env->active_tc.msa_fp_status);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* According to MIPS specifications, if one of the two operands is
|
||||||
|
* a sNaN, a new qNaN has to be generated. This is done in
|
||||||
|
* floatXX_silence_nan(). For qNaN inputs the specifications
|
||||||
|
* says: "When possible, this QNaN result is one of the operand QNaN
|
||||||
|
* values." In practice it seems that most implementations choose
|
||||||
|
* the first operand if both operands are qNaN. In short this gives
|
||||||
|
* the following rules:
|
||||||
|
* 1. A if it is signaling
|
||||||
|
* 2. B if it is signaling
|
||||||
|
* 3. A (quiet)
|
||||||
|
* 4. B (quiet)
|
||||||
|
* A signaling NaN is always silenced before returning it.
|
||||||
|
*/
|
||||||
|
set_float_2nan_prop_rule(float_2nan_prop_s_ab,
|
||||||
|
&env->active_tc.msa_fp_status);
|
||||||
|
|
||||||
/* clear float_status exception flags */
|
/* clear float_status exception flags */
|
||||||
set_float_exception_flags(0, &env->active_tc.msa_fp_status);
|
set_float_exception_flags(0, &env->active_tc.msa_fp_status);
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue