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target/arm: Use rmode >= 0 for need_rmode 

Initialize rmode to -1 instead of keeping two variables.
This is already used elsewhere in translate-a64.c.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-02-25 09:48:58 -10:00
parent f04de891b5
commit 0b29090a68
1 changed files with 6 additions and 28 deletions
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34
target/arm/tcg/translate-a64.c
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@ -12133,7 +12133,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
int rn = extract32(insn, 5, 5); int rn = extract32(insn, 5, 5);
int rd = extract32(insn, 0, 5); int rd = extract32(insn, 0, 5);
bool need_fpstatus = false; bool need_fpstatus = false;
bool need_rmode = false;
int rmode = -1; int rmode = -1;
TCGv_i32 tcg_rmode; TCGv_i32 tcg_rmode;
TCGv_ptr tcg_fpstatus; TCGv_ptr tcg_fpstatus;
@ -12283,7 +12282,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
case 0x7a: /* FCVTPU */ case 0x7a: /* FCVTPU */
case 0x7b: /* FCVTZU */ case 0x7b: /* FCVTZU */
need_fpstatus = true; need_fpstatus = true;
need_rmode = true;
rmode = extract32(opcode, 5, 1) | (extract32(opcode, 0, 1) << 1); rmode = extract32(opcode, 5, 1) | (extract32(opcode, 0, 1) << 1);
if (size == 3 && !is_q) { if (size == 3 && !is_q) {
unallocated_encoding(s); unallocated_encoding(s);
@ -12293,7 +12291,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
case 0x5c: /* FCVTAU */ case 0x5c: /* FCVTAU */
case 0x1c: /* FCVTAS */ case 0x1c: /* FCVTAS */
need_fpstatus = true; need_fpstatus = true;
need_rmode = true;
rmode = FPROUNDING_TIEAWAY; rmode = FPROUNDING_TIEAWAY;
if (size == 3 && !is_q) { if (size == 3 && !is_q) {
unallocated_encoding(s); unallocated_encoding(s);
@ -12352,7 +12349,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
case 0x19: /* FRINTM */ case 0x19: /* FRINTM */
case 0x38: /* FRINTP */ case 0x38: /* FRINTP */
case 0x39: /* FRINTZ */ case 0x39: /* FRINTZ */
need_rmode = true;
rmode = extract32(opcode, 5, 1) | (extract32(opcode, 0, 1) << 1); rmode = extract32(opcode, 5, 1) | (extract32(opcode, 0, 1) << 1);
/* fall through */ /* fall through */
case 0x59: /* FRINTX */ case 0x59: /* FRINTX */
@ -12364,7 +12360,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
} }
break; break;
case 0x58: /* FRINTA */ case 0x58: /* FRINTA */
need_rmode = true;
rmode = FPROUNDING_TIEAWAY; rmode = FPROUNDING_TIEAWAY;
need_fpstatus = true; need_fpstatus = true;
if (size == 3 && !is_q) { if (size == 3 && !is_q) {
@ -12380,7 +12375,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
break; break;
case 0x1e: /* FRINT32Z */ case 0x1e: /* FRINT32Z */
case 0x1f: /* FRINT64Z */ case 0x1f: /* FRINT64Z */
need_rmode = true;
rmode = FPROUNDING_ZERO; rmode = FPROUNDING_ZERO;
/* fall through */ /* fall through */
case 0x5e: /* FRINT32X */ case 0x5e: /* FRINT32X */
@ -12406,12 +12400,12 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
return; return;
} }
if (need_fpstatus || need_rmode) { if (need_fpstatus || rmode >= 0) {
tcg_fpstatus = fpstatus_ptr(FPST_FPCR); tcg_fpstatus = fpstatus_ptr(FPST_FPCR);
} else { } else {
tcg_fpstatus = NULL; tcg_fpstatus = NULL;
} }
if (need_rmode) { if (rmode >= 0) {
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode)); tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
} else { } else {
@ -12595,7 +12589,7 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
} }
clear_vec_high(s, is_q, rd); clear_vec_high(s, is_q, rd);
if (need_rmode) { if (tcg_rmode) {
gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
} }
} }
@ -12625,9 +12619,8 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
int pass; int pass;
TCGv_i32 tcg_rmode = NULL; TCGv_i32 tcg_rmode = NULL;
TCGv_ptr tcg_fpstatus = NULL; TCGv_ptr tcg_fpstatus = NULL;
bool need_rmode = false;
bool need_fpst = true; bool need_fpst = true;
int rmode; int rmode = -1;
if (!dc_isar_feature(aa64_fp16, s)) { if (!dc_isar_feature(aa64_fp16, s)) {
unallocated_encoding(s); unallocated_encoding(s);
@ -12676,27 +12669,22 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
case 0x3f: /* FRECPX */ case 0x3f: /* FRECPX */
break; break;
case 0x18: /* FRINTN */ case 0x18: /* FRINTN */
need_rmode = true;
only_in_vector = true; only_in_vector = true;
rmode = FPROUNDING_TIEEVEN; rmode = FPROUNDING_TIEEVEN;
break; break;
case 0x19: /* FRINTM */ case 0x19: /* FRINTM */
need_rmode = true;
only_in_vector = true; only_in_vector = true;
rmode = FPROUNDING_NEGINF; rmode = FPROUNDING_NEGINF;
break; break;
case 0x38: /* FRINTP */ case 0x38: /* FRINTP */
need_rmode = true;
only_in_vector = true; only_in_vector = true;
rmode = FPROUNDING_POSINF; rmode = FPROUNDING_POSINF;
break; break;
case 0x39: /* FRINTZ */ case 0x39: /* FRINTZ */
need_rmode = true;
only_in_vector = true; only_in_vector = true;
rmode = FPROUNDING_ZERO; rmode = FPROUNDING_ZERO;
break; break;
case 0x58: /* FRINTA */ case 0x58: /* FRINTA */
need_rmode = true;
only_in_vector = true; only_in_vector = true;
rmode = FPROUNDING_TIEAWAY; rmode = FPROUNDING_TIEAWAY;
break; break;
@ -12706,43 +12694,33 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
/* current rounding mode */ /* current rounding mode */
break; break;
case 0x1a: /* FCVTNS */ case 0x1a: /* FCVTNS */
need_rmode = true;
rmode = FPROUNDING_TIEEVEN; rmode = FPROUNDING_TIEEVEN;
break; break;
case 0x1b: /* FCVTMS */ case 0x1b: /* FCVTMS */
need_rmode = true;
rmode = FPROUNDING_NEGINF; rmode = FPROUNDING_NEGINF;
break; break;
case 0x1c: /* FCVTAS */ case 0x1c: /* FCVTAS */
need_rmode = true;
rmode = FPROUNDING_TIEAWAY; rmode = FPROUNDING_TIEAWAY;
break; break;
case 0x3a: /* FCVTPS */ case 0x3a: /* FCVTPS */
need_rmode = true;
rmode = FPROUNDING_POSINF; rmode = FPROUNDING_POSINF;
break; break;
case 0x3b: /* FCVTZS */ case 0x3b: /* FCVTZS */
need_rmode = true;
rmode = FPROUNDING_ZERO; rmode = FPROUNDING_ZERO;
break; break;
case 0x5a: /* FCVTNU */ case 0x5a: /* FCVTNU */
need_rmode = true;
rmode = FPROUNDING_TIEEVEN; rmode = FPROUNDING_TIEEVEN;
break; break;
case 0x5b: /* FCVTMU */ case 0x5b: /* FCVTMU */
need_rmode = true;
rmode = FPROUNDING_NEGINF; rmode = FPROUNDING_NEGINF;
break; break;
case 0x5c: /* FCVTAU */ case 0x5c: /* FCVTAU */
need_rmode = true;
rmode = FPROUNDING_TIEAWAY; rmode = FPROUNDING_TIEAWAY;
break; break;
case 0x7a: /* FCVTPU */ case 0x7a: /* FCVTPU */
need_rmode = true;
rmode = FPROUNDING_POSINF; rmode = FPROUNDING_POSINF;
break; break;
case 0x7b: /* FCVTZU */ case 0x7b: /* FCVTZU */
need_rmode = true;
rmode = FPROUNDING_ZERO; rmode = FPROUNDING_ZERO;
break; break;
case 0x2f: /* FABS */ case 0x2f: /* FABS */
@ -12775,11 +12753,11 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn)
return; return;
} }
if (need_rmode || need_fpst) { if (rmode >= 0 || need_fpst) {
tcg_fpstatus = fpstatus_ptr(FPST_FPCR_F16); tcg_fpstatus = fpstatus_ptr(FPST_FPCR_F16);
} }
if (need_rmode) { if (rmode >= 0) {
tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode)); tcg_rmode = tcg_const_i32(arm_rmode_to_sf(rmode));
gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus);
} }