ShuriZma
/
xemu
mirror of https://github.com/xemu-project/xemu.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

linux-user/microblaze: Fix SIGFPE si_codes 

Fix a typo for ESR_EC_DIVZERO, which is integral not floating-point.
Fix the if ladder for decoding floating-point exceptions.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220107213243.212806-14-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
Richard Henderson 2022-01-07 13:32:32 -08:00 committed by Laurent Vivier
parent 23ae825ab7
commit 0b25c4a1f6
1 changed files with 15 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
linux-user/microblaze/cpu_loop.c
View File

@ -77,15 +77,25 @@ void cpu_loop(CPUMBState *env)
env->iflags &= ~(IMM_FLAG | D_FLAG);
switch (env->esr & 31) {
case ESR_EC_DIVZERO:
si_code = TARGET_FPE_FLTDIV;
si_code = TARGET_FPE_INTDIV;
break;
case ESR_EC_FPU:
si_code = 0;
if (env->fsr & FSR_IO) {
/*
* Note that the kernel passes along fsr as si_code
* if there's no recognized bit set. Possibly this
* implies that si_code is 0, but follow the structure.
*/
si_code = env->fsr;
if (si_code & FSR_IO) {
si_code = TARGET_FPE_FLTINV;
}
if (env->fsr & FSR_DZ) {
} else if (si_code & FSR_OF) {
si_code = TARGET_FPE_FLTOVF;
} else if (si_code & FSR_UF) {
si_code = TARGET_FPE_FLTUND;
} else if (si_code & FSR_DZ) {
si_code = TARGET_FPE_FLTDIV;
} else if (si_code & FSR_DO) {
si_code = TARGET_FPE_FLTRES;
}
break;
default: