Check NIC model in some NIC init functions (Mark McLoughlin)

Some NIC init functions are only called when that model is
the only valid model. In that case, it makes sense to use
qemu_check_nic_model() from the NIC init function itself.

Signed-off-by: Mark McLoughlin <markmc@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6286 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
aliguori 2009-01-13 19:39:36 +00:00
parent 973cbd37ce
commit 0ae18ceeaa
18 changed files with 41 additions and 101 deletions

View File

@ -303,13 +303,10 @@ void axisdev88_init (ram_addr_t ram_size, int vga_ram_size,
}
/* Add the two ethernet blocks. */
nd_table[0].model = nd_table[0].model ? nd_table[0].model : "fseth";
eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0x30034000, 1);
if (nb_nics > 1) {
nd_table[1].model = nd_table[1].model ? nd_table[1].model : "fseth";
if (nb_nics > 1)
eth[1] = etraxfs_eth_init(&nd_table[1], env,
pic->irq + 26, 0x30036000, 2);
}
/* The DMA Connector block is missing, hardwire things for now. */
etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);

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@ -94,13 +94,10 @@ void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,
}
/* Add the two ethernet blocks. */
nd_table[0].model = nd_table[0].model ? nd_table[0].model : "fseth";
eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0x30034000, 1);
if (nb_nics > 1) {
nd_table[1].model = nd_table[1].model ? nd_table[1].model : "fseth";
if (nb_nics > 1)
eth[1] = etraxfs_eth_init(&nd_table[1], env,
pic->irq + 26, 0x30036000, 2);
}
/* The DMA Connector block is missing, hardwire things for now. */
etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);

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@ -561,6 +561,8 @@ void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
struct etraxfs_dma_client *dma = NULL;
struct fs_eth *eth = NULL;
qemu_check_nic_model(nd, "fseth");
dma = qemu_mallocz(sizeof *dma * 2);
if (!dma)
return NULL;

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@ -497,18 +497,8 @@ static void integratorcp_init(ram_addr_t ram_size, int vga_ram_size,
exit(1);
}
pl181_init(0x1c000000, drives_table[sd].bdrv, pic[23], pic[24]);
if (nd_table[0].vlan) {
if (nd_table[0].model == NULL
|| strcmp(nd_table[0].model, "smc91c111") == 0) {
smc91c111_init(&nd_table[0], 0xc8000000, pic[27]);
} else if (strcmp(nd_table[0].model, "?") == 0) {
fprintf(stderr, "qemu: Supported NICs: smc91c111\n");
exit (1);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
}
if (nd_table[0].vlan)
smc91c111_init(&nd_table[0], 0xc8000000, pic[27]);
pl110_init(ds, 0xc0000000, pic[22], 0);
integrator_binfo.ram_size = ram_size;

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@ -241,18 +241,8 @@ static void mcf5208evb_init(ram_addr_t ram_size, int vga_ram_size,
fprintf(stderr, "Too many NICs\n");
exit(1);
}
if (nd_table[0].vlan) {
if (nd_table[0].model == NULL
|| strcmp(nd_table[0].model, "mcf_fec") == 0) {
mcf_fec_init(&nd_table[0], 0xfc030000, pic + 36);
} else if (strcmp(nd_table[0].model, "?") == 0) {
fprintf(stderr, "qemu: Supported NICs: mcf_fec\n");
exit (1);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
}
if (nd_table[0].vlan)
mcf_fec_init(&nd_table[0], 0xfc030000, pic + 36);
/* 0xfc000000 SCM. */
/* 0xfc004000 XBS. */

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@ -446,6 +446,8 @@ void mcf_fec_init(NICInfo *nd, target_phys_addr_t base, qemu_irq *irq)
mcf_fec_state *s;
int iomemtype;
qemu_check_nic_model(nd, "mcf_fec");
s = (mcf_fec_state *)qemu_mallocz(sizeof(mcf_fec_state));
s->irq = irq;
iomemtype = cpu_register_io_memory(0, mcf_fec_readfn,

View File

@ -175,19 +175,9 @@ mips_mipssim_init (ram_addr_t ram_size, int vga_ram_size,
if (serial_hds[0])
serial_init(0x3f8, env->irq[4], 115200, serial_hds[0]);
if (nd_table[0].vlan) {
if (nd_table[0].model == NULL
|| strcmp(nd_table[0].model, "mipsnet") == 0) {
/* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
} else if (strcmp(nd_table[0].model, "?") == 0) {
fprintf(stderr, "qemu: Supported NICs: mipsnet\n");
exit (1);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
}
if (nd_table[0].vlan)
/* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
}
QEMUMachine mips_mipssim_machine = {

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@ -247,20 +247,8 @@ void mips_r4k_init (ram_addr_t ram_size, int vga_ram_size,
isa_vga_init(ds, phys_ram_base + ram_size, ram_size,
vga_ram_size);
if (nd_table[0].vlan) {
if (nd_table[i].model == NULL) {
nd_table[i].model = "ne2k_isa";
}
if (strcmp(nd_table[0].model, "ne2k_isa") == 0) {
isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
} else if (strcmp(nd_table[0].model, "?") == 0) {
fprintf(stderr, "qemu: Supported NICs: ne2k_isa\n");
exit (1);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
}
if (nd_table[0].vlan)
isa_ne2000_init(0x300, i8259[9], &nd_table[0]);
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
fprintf(stderr, "qemu: too many IDE bus\n");

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@ -236,6 +236,8 @@ void mipsnet_init (int base, qemu_irq irq, NICInfo *nd)
{
MIPSnetState *s;
qemu_check_nic_model(nd, "mipsnet");
s = qemu_mallocz(sizeof(MIPSnetState));
if (!s)
return;

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@ -714,6 +714,8 @@ static void mv88w8618_eth_init(NICInfo *nd, uint32_t base, qemu_irq irq)
mv88w8618_eth_state *s;
int iomemtype;
qemu_check_nic_model(nd, "mv88w8618");
s = qemu_mallocz(sizeof(mv88w8618_eth_state));
if (!s)
return;

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@ -722,6 +722,8 @@ void isa_ne2000_init(int base, qemu_irq irq, NICInfo *nd)
{
NE2000State *s;
qemu_check_nic_model(nd, "ne2k_isa");
s = qemu_mallocz(sizeof(NE2000State));
if (!s)
return;

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@ -2087,6 +2087,8 @@ void lance_init(NICInfo *nd, target_phys_addr_t leaddr, void *dma_opaque,
PCNetState *d;
int lance_io_memory;
qemu_check_nic_model(nd, "lance");
d = qemu_mallocz(sizeof(PCNetState));
if (!d)
return;

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@ -121,11 +121,13 @@ static void realview_init(ram_addr_t ram_size, int vga_ram_size,
}
for(n = 0; n < nb_nics; n++) {
nd = &nd_table[n];
if (!nd->model)
nd->model = done_smc ? "rtl8139" : "smc91c111";
if (strcmp(nd->model, "smc91c111") == 0) {
if ((!nd->model && !done_smc) || strcmp(nd->model, "smc91c111") == 0) {
smc91c111_init(nd, 0x4e000000, pic[28]);
done_smc = 1;
} else {
if (!nd->model)
nd->model = "rtl8139";
pci_nic_init(pci_bus, nd, -1);
}
}

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@ -695,6 +695,8 @@ void smc91c111_init(NICInfo *nd, uint32_t base, qemu_irq irq)
smc91c111_state *s;
int iomemtype;
qemu_check_nic_model(nd, "smc91c111");
s = (smc91c111_state *)qemu_mallocz(sizeof(smc91c111_state));
iomemtype = cpu_register_io_memory(0, smc91c111_readfn,
smc91c111_writefn, s);

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@ -1361,10 +1361,8 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model,
pl022_init(0x40008000, pic[7], NULL, NULL);
}
}
if (board->dc4 & (1 << 28)) {
/* FIXME: Obey network model. */
if (board->dc4 & (1 << 28))
stellaris_enet_init(&nd_table[0], 0x40048000, pic[42]);
}
if (board->peripherals & BP_GAMEPAD) {
qemu_irq gpad_irq[5];
static const int gpad_keycode[5] = { 0xc8, 0xd0, 0xcb, 0xcd, 0x1d };

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@ -389,6 +389,8 @@ void stellaris_enet_init(NICInfo *nd, uint32_t base, qemu_irq irq)
stellaris_enet_state *s;
int iomemtype;
qemu_check_nic_model(nd, "stellaris");
s = (stellaris_enet_state *)qemu_mallocz(sizeof(stellaris_enet_state));
iomemtype = cpu_register_io_memory(0, stellaris_enet_readfn,
stellaris_enet_writefn, s);

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@ -536,17 +536,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
if (nd_table[0].model == NULL)
nd_table[0].model = "lance";
if (strcmp(nd_table[0].model, "lance") == 0) {
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
} else if (strcmp(nd_table[0].model, "?") == 0) {
fprintf(stderr, "qemu: Supported NICs: lance\n");
exit (1);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
nvram = m48t59_init(slavio_irq[0], hwdef->nvram_base, 0,
hwdef->nvram_size, 8);
@ -1329,17 +1319,7 @@ static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
if (nd_table[0].model == NULL)
nd_table[0].model = "lance";
if (strcmp(nd_table[0].model, "lance") == 0) {
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
} else if (strcmp(nd_table[0].model, "?") == 0) {
fprintf(stderr, "qemu: Supported NICs: lance\n");
exit (1);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
nvram = m48t59_init(sbi_irq[0], hwdef->nvram_base, 0,
hwdef->nvram_size, 8);
@ -1545,17 +1525,7 @@ static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
tcx_init(ds, hwdef->tcx_base, phys_ram_base + tcx_offset, tcx_offset,
hwdef->vram_size, graphic_width, graphic_height, graphic_depth);
if (nd_table[0].model == NULL)
nd_table[0].model = "lance";
if (strcmp(nd_table[0].model, "lance") == 0) {
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
} else if (strcmp(nd_table[0].model, "?") == 0) {
fprintf(stderr, "qemu: Supported NICs: lance\n");
exit (1);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
}
lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
nvram = m48t59_init(slavio_irq[0], hwdef->nvram_base, 0,
hwdef->nvram_size, 2);

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@ -194,11 +194,13 @@ static void versatile_init(ram_addr_t ram_size, int vga_ram_size,
so many of the qemu PCI devices are not useable. */
for(n = 0; n < nb_nics; n++) {
nd = &nd_table[n];
if (!nd->model)
nd->model = done_smc ? "rtl8139" : "smc91c111";
if (strcmp(nd->model, "smc91c111") == 0) {
if ((!nd->model && !done_smc) || strcmp(nd->model, "smc91c111") == 0) {
smc91c111_init(nd, 0x10010000, sic[25]);
done_smc = 1;
} else {
if (!nd->model)
nd->model = "rtl8139";
pci_nic_init(pci_bus, nd, -1);
}
}