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target/ppc: Get rid of POWERPC_MMU_VER() macros 

These macros were introduced to deal with the fact that the mmu_model
field has bit flags mixed in with what's otherwise an enum of various mmu
types.

We've now eliminated all those flags except for one, and that one -
POWERPC_MMU_64 - is already included/compared in the MMU_VER macros.  So,
we can get rid of those macros and just directly compare mmu_model values
in the places it was used.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
This commit is contained in:
David Gibson 2018-03-23 16:48:43 +11:00
parent ca79b3b7fd
commit 0941d728a4
5 changed files with 28 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
target/ppc/cpu-qom.h
View File

@ -79,12 +79,6 @@ enum powerpc_mmu_t {
/* Architecture 3.00 variant */ /* Architecture 3.00 variant */
POWERPC_MMU_3_00 = POWERPC_MMU_64 | 0x00000005, POWERPC_MMU_3_00 = POWERPC_MMU_64 | 0x00000005,
}; };
#define POWERPC_MMU_VER(x) ((x) & (POWERPC_MMU_64 | 0xFFFF))
#define POWERPC_MMU_VER_64B POWERPC_MMU_VER(POWERPC_MMU_64B)
#define POWERPC_MMU_VER_2_03 POWERPC_MMU_VER(POWERPC_MMU_2_03)
#define POWERPC_MMU_VER_2_06 POWERPC_MMU_VER(POWERPC_MMU_2_06)
#define POWERPC_MMU_VER_2_07 POWERPC_MMU_VER(POWERPC_MMU_2_07)
#define POWERPC_MMU_VER_3_00 POWERPC_MMU_VER(POWERPC_MMU_3_00)
/*****************************************************************************/ /*****************************************************************************/
/* Exception model */ /* Exception model */

8
target/ppc/kvm.c
View File

@ -306,8 +306,8 @@ static void kvm_get_fallback_smmu_info(PowerPCCPU *cpu,
info->flags |= KVM_PPC_1T_SEGMENTS; info->flags |= KVM_PPC_1T_SEGMENTS;
} }
if (POWERPC_MMU_VER(env->mmu_model) == POWERPC_MMU_VER_2_06 || if (env->mmu_model == POWERPC_MMU_2_06 ||
POWERPC_MMU_VER(env->mmu_model) == POWERPC_MMU_VER_2_07) { env->mmu_model == POWERPC_MMU_2_07) {
info->slb_size = 32; info->slb_size = 32;
} else { } else {
info->slb_size = 64; info->slb_size = 64;
@ -321,8 +321,8 @@ static void kvm_get_fallback_smmu_info(PowerPCCPU *cpu,
i++; i++;
/* 64K on MMU 2.06 and later */ /* 64K on MMU 2.06 and later */
if (POWERPC_MMU_VER(env->mmu_model) == POWERPC_MMU_VER_2_06 || if (env->mmu_model == POWERPC_MMU_2_06 ||
POWERPC_MMU_VER(env->mmu_model) == POWERPC_MMU_VER_2_07) { env->mmu_model == POWERPC_MMU_2_07) {
info->sps[i].page_shift = 16; info->sps[i].page_shift = 16;
info->sps[i].slb_enc = 0x110; info->sps[i].slb_enc = 0x110;
info->sps[i].enc[0].page_shift = 16; info->sps[i].enc[0].page_shift = 16;

12
target/ppc/mmu-hash64.c
View File

@ -1033,8 +1033,8 @@ void helper_store_lpcr(CPUPPCState *env, target_ulong val)
uint64_t lpcr = 0; uint64_t lpcr = 0;
/* Filter out bits */ /* Filter out bits */
switch (POWERPC_MMU_VER(env->mmu_model)) { switch (env->mmu_model) {
case POWERPC_MMU_VER_64B: /* 970 */ case POWERPC_MMU_64B: /* 970 */
if (val & 0x40) { if (val & 0x40) {
lpcr |= LPCR_LPES0; lpcr |= LPCR_LPES0;
} }
@ -1060,26 +1060,26 @@ void helper_store_lpcr(CPUPPCState *env, target_ulong val)
* to dig HRMOR out of HID5 * to dig HRMOR out of HID5
*/ */
break; break;
case POWERPC_MMU_VER_2_03: /* P5p */ case POWERPC_MMU_2_03: /* P5p */
lpcr = val & (LPCR_RMLS | LPCR_ILE | lpcr = val & (LPCR_RMLS | LPCR_ILE |
LPCR_LPES0 | LPCR_LPES1 | LPCR_LPES0 | LPCR_LPES1 |
LPCR_RMI | LPCR_HDICE); LPCR_RMI | LPCR_HDICE);
break; break;
case POWERPC_MMU_VER_2_06: /* P7 */ case POWERPC_MMU_2_06: /* P7 */
lpcr = val & (LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_DPFD | lpcr = val & (LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_DPFD |
LPCR_VRMASD | LPCR_RMLS | LPCR_ILE | LPCR_VRMASD | LPCR_RMLS | LPCR_ILE |
LPCR_P7_PECE0 | LPCR_P7_PECE1 | LPCR_P7_PECE2 | LPCR_P7_PECE0 | LPCR_P7_PECE1 | LPCR_P7_PECE2 |
LPCR_MER | LPCR_TC | LPCR_MER | LPCR_TC |
LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE); LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE);
break; break;
case POWERPC_MMU_VER_2_07: /* P8 */ case POWERPC_MMU_2_07: /* P8 */
lpcr = val & (LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV | lpcr = val & (LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV |
LPCR_DPFD | LPCR_VRMASD | LPCR_RMLS | LPCR_ILE | LPCR_DPFD | LPCR_VRMASD | LPCR_RMLS | LPCR_ILE |
LPCR_AIL | LPCR_ONL | LPCR_P8_PECE0 | LPCR_P8_PECE1 | LPCR_AIL | LPCR_ONL | LPCR_P8_PECE0 | LPCR_P8_PECE1 |
LPCR_P8_PECE2 | LPCR_P8_PECE3 | LPCR_P8_PECE4 | LPCR_P8_PECE2 | LPCR_P8_PECE3 | LPCR_P8_PECE4 |
LPCR_MER | LPCR_TC | LPCR_LPES0 | LPCR_HDICE); LPCR_MER | LPCR_TC | LPCR_LPES0 | LPCR_HDICE);
break; break;
case POWERPC_MMU_VER_3_00: /* P9 */ case POWERPC_MMU_3_00: /* P9 */
lpcr = val & (LPCR_VPM1 | LPCR_ISL | LPCR_KBV | LPCR_DPFD | lpcr = val & (LPCR_VPM1 | LPCR_ISL | LPCR_KBV | LPCR_DPFD |
(LPCR_PECE_U_MASK & LPCR_HVEE) | LPCR_ILE | LPCR_AIL | (LPCR_PECE_U_MASK & LPCR_HVEE) | LPCR_ILE | LPCR_AIL |
LPCR_UPRT | LPCR_EVIRT | LPCR_ONL | LPCR_UPRT | LPCR_EVIRT | LPCR_ONL |

24
target/ppc/mmu_helper.c
View File

@ -1266,7 +1266,7 @@ static void mmu6xx_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env) void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
{ {
switch (POWERPC_MMU_VER(env->mmu_model)) { switch (env->mmu_model) {
case POWERPC_MMU_BOOKE: case POWERPC_MMU_BOOKE:
mmubooke_dump_mmu(f, cpu_fprintf, env); mmubooke_dump_mmu(f, cpu_fprintf, env);
break; break;
@ -1278,13 +1278,13 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
mmu6xx_dump_mmu(f, cpu_fprintf, env); mmu6xx_dump_mmu(f, cpu_fprintf, env);
break; break;
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
case POWERPC_MMU_VER_64B: case POWERPC_MMU_64B:
case POWERPC_MMU_VER_2_03: case POWERPC_MMU_2_03:
case POWERPC_MMU_VER_2_06: case POWERPC_MMU_2_06:
case POWERPC_MMU_VER_2_07: case POWERPC_MMU_2_07:
dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env)); dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env));
break; break;
case POWERPC_MMU_VER_3_00: case POWERPC_MMU_3_00:
if (ppc64_radix_guest(ppc_env_get_cpu(env))) { if (ppc64_radix_guest(ppc_env_get_cpu(env))) {
/* TODO - Unsupported */ /* TODO - Unsupported */
} else { } else {
@ -1423,14 +1423,14 @@ hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
CPUPPCState *env = &cpu->env; CPUPPCState *env = &cpu->env;
mmu_ctx_t ctx; mmu_ctx_t ctx;
switch (POWERPC_MMU_VER(env->mmu_model)) { switch (env->mmu_model) {
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
case POWERPC_MMU_VER_64B: case POWERPC_MMU_64B:
case POWERPC_MMU_VER_2_03: case POWERPC_MMU_2_03:
case POWERPC_MMU_VER_2_06: case POWERPC_MMU_2_06:
case POWERPC_MMU_VER_2_07: case POWERPC_MMU_2_07:
return ppc_hash64_get_phys_page_debug(cpu, addr); return ppc_hash64_get_phys_page_debug(cpu, addr);
case POWERPC_MMU_VER_3_00: case POWERPC_MMU_3_00:
if (ppc64_radix_guest(ppc_env_get_cpu(env))) { if (ppc64_radix_guest(ppc_env_get_cpu(env))) {
return ppc_radix64_get_phys_page_debug(cpu, addr); return ppc_radix64_get_phys_page_debug(cpu, addr);
} else { } else {

12
target/ppc/translate.c
View File

@ -7121,17 +7121,17 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
if (env->spr_cb[SPR_LPCR].name) if (env->spr_cb[SPR_LPCR].name)
cpu_fprintf(f, " LPCR " TARGET_FMT_lx "\n", env->spr[SPR_LPCR]); cpu_fprintf(f, " LPCR " TARGET_FMT_lx "\n", env->spr[SPR_LPCR]);
switch (POWERPC_MMU_VER(env->mmu_model)) { switch (env->mmu_model) {
case POWERPC_MMU_32B: case POWERPC_MMU_32B:
case POWERPC_MMU_601: case POWERPC_MMU_601:
case POWERPC_MMU_SOFT_6xx: case POWERPC_MMU_SOFT_6xx:
case POWERPC_MMU_SOFT_74xx: case POWERPC_MMU_SOFT_74xx:
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)
case POWERPC_MMU_VER_64B: case POWERPC_MMU_64B:
case POWERPC_MMU_VER_2_03: case POWERPC_MMU_2_03:
case POWERPC_MMU_VER_2_06: case POWERPC_MMU_2_06:
case POWERPC_MMU_VER_2_07: case POWERPC_MMU_2_07:
case POWERPC_MMU_VER_3_00: case POWERPC_MMU_3_00:
#endif #endif
if (env->spr_cb[SPR_SDR1].name) { /* SDR1 Exists */ if (env->spr_cb[SPR_SDR1].name) { /* SDR1 Exists */
cpu_fprintf(f, " SDR1 " TARGET_FMT_lx " ", env->spr[SPR_SDR1]); cpu_fprintf(f, " SDR1 " TARGET_FMT_lx " ", env->spr[SPR_SDR1]);