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i8259: convert DPRINTFs into trace 

One thing to mention is that in pic_set_irq() I need to uncomment a few
lines in the macros to make sure IRQ value calculation is correct.

Signed-off-by: Peter Xu <peterx@redhat.com>
Message-Id: <20171210063819.14892-2-peterx@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Peter Xu 2017-12-10 14:38:15 +08:00 committed by Paolo Bonzini
parent ed57c75796
commit 0880a87300
2 changed files with 18 additions and 15 deletions
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26
hw/intc/i8259.c
View File

@ -30,17 +30,11 @@
#include "qemu/log.h" #include "qemu/log.h"
#include "hw/isa/i8259_internal.h" #include "hw/isa/i8259_internal.h"
#include "hw/intc/intc.h" #include "hw/intc/intc.h"
#include "trace.h"
/* debug PIC */ /* debug PIC */
//#define DEBUG_PIC //#define DEBUG_PIC
#ifdef DEBUG_PIC
#define DPRINTF(fmt, ...) \
do { printf("pic: " fmt , ## __VA_ARGS__); } while (0)
#else
#define DPRINTF(fmt, ...)
#endif
//#define DEBUG_IRQ_LATENCY //#define DEBUG_IRQ_LATENCY
//#define DEBUG_IRQ_COUNT //#define DEBUG_IRQ_COUNT
@ -122,8 +116,7 @@ static void pic_update_irq(PICCommonState *s)
irq = pic_get_irq(s); irq = pic_get_irq(s);
if (irq >= 0) { if (irq >= 0) {
DPRINTF("pic%d: imr=%x irr=%x padd=%d\n", trace_pic_update_irq(s->master, s->imr, s->irr, s->priority_add);
s->master ? 0 : 1, s->imr, s->irr, s->priority_add);
qemu_irq_raise(s->int_out[0]); qemu_irq_raise(s->int_out[0]);
} else { } else {
qemu_irq_lower(s->int_out[0]); qemu_irq_lower(s->int_out[0]);
@ -140,9 +133,11 @@ static void pic_set_irq(void *opaque, int irq, int level)
defined(DEBUG_IRQ_LATENCY) defined(DEBUG_IRQ_LATENCY)
int irq_index = s->master ? irq : irq + 8; int irq_index = s->master ? irq : irq + 8;
#endif #endif
trace_pic_set_irq(s->master, irq, level);
#if defined(DEBUG_PIC) || defined(DEBUG_IRQ_COUNT) #if defined(DEBUG_PIC) || defined(DEBUG_IRQ_COUNT)
if (level != irq_level[irq_index]) { if (level != irq_level[irq_index]) {
DPRINTF("pic_set_irq: irq=%d level=%d\n", irq_index, level);
irq_level[irq_index] = level; irq_level[irq_index] = level;
#ifdef DEBUG_IRQ_COUNT #ifdef DEBUG_IRQ_COUNT
if (level == 1) { if (level == 1) {
@ -223,18 +218,18 @@ int pic_read_irq(DeviceState *d)
intno = s->irq_base + irq; intno = s->irq_base + irq;
} }
#if defined(DEBUG_PIC) || defined(DEBUG_IRQ_LATENCY)
if (irq == 2) { if (irq == 2) {
irq = irq2 + 8; irq = irq2 + 8;
} }
#endif
#ifdef DEBUG_IRQ_LATENCY #ifdef DEBUG_IRQ_LATENCY
printf("IRQ%d latency=%0.3fus\n", printf("IRQ%d latency=%0.3fus\n",
irq, irq,
(double)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - (double)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) -
irq_time[irq]) * 1000000.0 / NANOSECONDS_PER_SECOND); irq_time[irq]) * 1000000.0 / NANOSECONDS_PER_SECOND);
#endif #endif
DPRINTF("pic_interrupt: irq=%d\n", irq);
trace_pic_interrupt(irq, intno);
return intno; return intno;
} }
@ -289,7 +284,8 @@ static void pic_ioport_write(void *opaque, hwaddr addr64,
uint32_t val = val64; uint32_t val = val64;
int priority, cmd, irq; int priority, cmd, irq;
DPRINTF("write: addr=0x%02x val=0x%02x\n", addr, val); trace_pic_ioport_write(s->master, addr, val);
if (addr == 0) { if (addr == 0) {
if (val & 0x10) { if (val & 0x10) {
pic_init_reset(s); pic_init_reset(s);
@ -402,7 +398,7 @@ static uint64_t pic_ioport_read(void *opaque, hwaddr addr,
ret = s->imr; ret = s->imr;
} }
} }
DPRINTF("read: addr=0x%02" HWADDR_PRIx " val=0x%02x\n", addr, ret); trace_pic_ioport_read(s->master, addr, ret);
return ret; return ret;
} }

7
hw/intc/trace-events
View File

@ -1,5 +1,12 @@
# See docs/devel/tracing.txt for syntax documentation. # See docs/devel/tracing.txt for syntax documentation.
# hw/intc/i8259.c
pic_update_irq(bool master, uint8_t imr, uint8_t irr, uint8_t padd) "master %d imr %"PRIu8" irr %"PRIu8" padd %"PRIu8
pic_set_irq(bool master, int irq, int level) "master %d irq %d level %d"
pic_interrupt(int irq, int intno) "irq %d intno %d"
pic_ioport_write(bool master, uint64_t addr, uint64_t val) "master %d addr 0x%"PRIx64" val 0x%"PRIx64
pic_ioport_read(bool master, uint64_t addr, int val) "master %d addr 0x%"PRIx64" val 0x%x"
# hw/intc/apic_common.c # hw/intc/apic_common.c
cpu_set_apic_base(uint64_t val) "0x%016"PRIx64 cpu_set_apic_base(uint64_t val) "0x%016"PRIx64
cpu_get_apic_base(uint64_t val) "0x%016"PRIx64 cpu_get_apic_base(uint64_t val) "0x%016"PRIx64