target/hppa: Implement HADD

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-09-20 13:50:01 +02:00
parent d265360f07
commit 0843563f3e
4 changed files with 79 additions and 1 deletions

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@ -14,6 +14,9 @@ DEF_HELPER_FLAGS_3(stdby_e_parallel, TCG_CALL_NO_WG, void, env, tl, tl)
DEF_HELPER_FLAGS_1(ldc_check, TCG_CALL_NO_RWG, void, tl)
DEF_HELPER_FLAGS_2(hadd_ss, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_2(hadd_us, TCG_CALL_NO_RWG_SE, i64, i64, i64)
DEF_HELPER_FLAGS_4(probe, TCG_CALL_NO_WG, tl, env, tl, i32, i32)
DEF_HELPER_FLAGS_1(loaded_fr0, TCG_CALL_NO_RWG, void, env)

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@ -65,6 +65,7 @@
&ldst t b x disp sp m scale size
&rr_cf_d t r cf d
&rrr t r1 r2
&rrr_cf t r1 r2 cf
&rrr_cf_d t r1 r2 cf d
&rrr_cf_d_sh t r1 r2 cf d sh
@ -81,6 +82,7 @@
####
@rr_cf_d ...... r:5 ..... cf:4 ...... d:1 t:5 &rr_cf_d
@rrr ...... r2:5 r1:5 .... ....... t:5 &rrr
@rrr_cf ...... r2:5 r1:5 cf:4 ....... t:5 &rrr_cf
@rrr_cf_d ...... r2:5 r1:5 cf:4 ...... d:1 t:5 &rrr_cf_d
@rrr_cf_d_sh ...... r2:5 r1:5 cf:4 .... sh:2 d:1 t:5 &rrr_cf_d_sh
@ -208,6 +210,10 @@ subi_tsv 100101 ..... ..... .... 1 ........... @rri_cf
cmpiclr 100100 ..... ..... .... . ........... @rri_cf_d
hadd 000010 ..... ..... 00000011 11 0 ..... @rrr
hadd_ss 000010 ..... ..... 00000011 01 0 ..... @rrr
hadd_us 000010 ..... ..... 00000011 00 0 ..... @rrr
####
# Index Mem
####
@ -429,7 +435,7 @@ fmpyfadd_d 101110 rm1:5 rm2:5 ... 0 1 ..0 0 0 neg:1 t:5 ra3=%rc32
@f0e_f_3 ...... ..... ..... ... .0 110 ..0 ..... \
&fclass3 r1=%ra64 r2=%rb64 t=%rt64
@f0e_d_3 ...... r1:5 r2:5 ... 01 110 000 t:5
@f0e_d_3 ...... r1:5 r2:5 ... 01 110 000 t:5 &fclass3
# Floating point class 0

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@ -377,3 +377,35 @@ target_ulong HELPER(read_interval_timer)(void)
return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) >> 2;
#endif
}
uint64_t HELPER(hadd_ss)(uint64_t r1, uint64_t r2)
{
uint64_t ret = 0;
for (int i = 0; i < 64; i += 16) {
int f1 = sextract64(r1, i, 16);
int f2 = sextract64(r2, i, 16);
int fr = f1 + f2;
fr = MIN(fr, INT16_MAX);
fr = MAX(fr, INT16_MIN);
ret = deposit64(ret, i, 16, fr);
}
return ret;
}
uint64_t HELPER(hadd_us)(uint64_t r1, uint64_t r2)
{
uint64_t ret = 0;
for (int i = 0; i < 64; i += 16) {
int f1 = extract64(r1, i, 16);
int f2 = sextract64(r2, i, 16);
int fr = f1 + f2;
fr = MIN(fr, UINT16_MAX);
fr = MAX(fr, 0);
ret = deposit64(ret, i, 16, fr);
}
return ret;
}

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@ -23,6 +23,7 @@
#include "qemu/host-utils.h"
#include "exec/exec-all.h"
#include "tcg/tcg-op.h"
#include "tcg/tcg-op-gvec.h"
#include "exec/helper-proto.h"
#include "exec/helper-gen.h"
#include "exec/translator.h"
@ -2767,6 +2768,42 @@ static bool trans_cmpiclr(DisasContext *ctx, arg_rri_cf_d *a)
return nullify_end(ctx);
}
static bool do_multimedia(DisasContext *ctx, arg_rrr *a,
void (*fn)(TCGv_i64, TCGv_i64, TCGv_i64))
{
TCGv_i64 r1, r2, dest;
if (!ctx->is_pa20) {
return false;
}
nullify_over(ctx);
r1 = load_gpr(ctx, a->r1);
r2 = load_gpr(ctx, a->r2);
dest = dest_gpr(ctx, a->t);
fn(dest, r1, r2);
save_gpr(ctx, a->t, dest);
return nullify_end(ctx);
}
static bool trans_hadd(DisasContext *ctx, arg_rrr *a)
{
return do_multimedia(ctx, a, tcg_gen_vec_add16_i64);
}
static bool trans_hadd_ss(DisasContext *ctx, arg_rrr *a)
{
return do_multimedia(ctx, a, gen_helper_hadd_ss);
}
static bool trans_hadd_us(DisasContext *ctx, arg_rrr *a)
{
return do_multimedia(ctx, a, gen_helper_hadd_us);
}
static bool trans_ld(DisasContext *ctx, arg_ldst *a)
{
if (!ctx->is_pa20 && a->size > MO_32) {