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s390x/tcg: Implement VECTOR FIND ELEMENT NOT EQUAL 

Similar to VECTOR FIND ELEMENT EQUAL. Core logic courtesy of Richard H.

Add s390_vec_read_element() that can deal with element sizes.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
This commit is contained in:
David Hildenbrand 2019-05-24 11:26:45 +02:00
parent 8c0e1e58ce
commit 074e99b3b5
5 changed files with 132 additions and 0 deletions
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6
target/s390x/helper.h
View File

@ -224,6 +224,12 @@ DEF_HELPER_FLAGS_4(gvec_vfee32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_5(gvec_vfee_cc8, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfee_cc16, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfee_cc32, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_FLAGS_4(gvec_vfene8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vfene16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_FLAGS_4(gvec_vfene32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
DEF_HELPER_5(gvec_vfene_cc8, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfene_cc16, void, ptr, cptr, cptr, env, i32)
DEF_HELPER_5(gvec_vfene_cc32, void, ptr, cptr, cptr, env, i32)
#ifndef CONFIG_USER_ONLY
DEF_HELPER_3(servc, i32, env, i64, i64)

2
target/s390x/insn-data.def
View File

@ -1197,6 +1197,8 @@
F(0xe782, VFAE, VRR_b, V, 0, 0, 0, 0, vfae, 0, IF_VEC)
/* VECTOR FIND ELEMENT EQUAL */
F(0xe780, VFEE, VRR_b, V, 0, 0, 0, 0, vfee, 0, IF_VEC)
/* VECTOR FIND ELEMENT NOT EQUAL */
F(0xe781, VFENE, VRR_b, V, 0, 0, 0, 0, vfene, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */

31
target/s390x/translate_vx.inc.c
View File

@ -2414,3 +2414,34 @@ static DisasJumpType op_vfee(DisasContext *s, DisasOps *o)
}
return DISAS_NEXT;
}
static DisasJumpType op_vfene(DisasContext *s, DisasOps *o)
{
const uint8_t es = get_field(s->fields, m4);
const uint8_t m5 = get_field(s->fields, m5);
static gen_helper_gvec_3 * const g[3] = {
gen_helper_gvec_vfene8,
gen_helper_gvec_vfene16,
gen_helper_gvec_vfene32,
};
static gen_helper_gvec_3_ptr * const g_cc[3] = {
gen_helper_gvec_vfene_cc8,
gen_helper_gvec_vfene_cc16,
gen_helper_gvec_vfene_cc32,
};
if (es > ES_32 || m5 & ~0x3) {
gen_program_exception(s, PGM_SPECIFICATION);
return DISAS_NORETURN;
}
if (extract32(m5, 0, 1)) {
gen_gvec_3_ptr(get_field(s->fields, v1), get_field(s->fields, v2),
get_field(s->fields, v3), cpu_env, m5, g_cc[es]);
set_cc_static(s);
} else {
gen_gvec_3_ool(get_field(s->fields, v1), get_field(s->fields, v2),
get_field(s->fields, v3), m5, g[es]);
}
return DISAS_NEXT;
}

19
target/s390x/vec.h
View File

@ -12,6 +12,8 @@
#ifndef S390X_VEC_H
#define S390X_VEC_H
#include "tcg/tcg.h"
typedef union S390Vector {
uint64_t doubleword[2];
uint32_t word[4];
@ -70,6 +72,23 @@ static inline uint64_t s390_vec_read_element64(const S390Vector *v, uint8_t enr)
return v->doubleword[enr];
}
static inline uint64_t s390_vec_read_element(const S390Vector *v, uint8_t enr,
uint8_t es)
{
switch (es) {
case MO_8:
return s390_vec_read_element8(v, enr);
case MO_16:
return s390_vec_read_element16(v, enr);
case MO_32:
return s390_vec_read_element32(v, enr);
case MO_64:
return s390_vec_read_element64(v, enr);
default:
g_assert_not_reached();
}
}
static inline void s390_vec_write_element8(S390Vector *v, uint8_t enr,
uint8_t data)
{

74
target/s390x/vec_string_helper.c
View File

@ -27,6 +27,15 @@ static inline uint64_t zero_search(uint64_t a, uint64_t mask)
return ~(((a & mask) + mask) | a | mask);
}
/*
* Returns a bit set in the MSB of each element that is not zero,
* as defined by the mask.
*/
static inline uint64_t nonzero_search(uint64_t a, uint64_t mask)
{
return (((a & mask) + mask) | a) & ~mask;
}
/*
* Returns the byte offset for the first match, or 16 for no match.
*/
@ -209,3 +218,68 @@ void HELPER(gvec_vfee_cc##BITS)(void *v1, const void *v2, const void *v3, \
DEF_VFEE_CC_HELPER(8)
DEF_VFEE_CC_HELPER(16)
DEF_VFEE_CC_HELPER(32)
static int vfene(void *v1, const void *v2, const void *v3, bool zs, uint8_t es)
{
const uint64_t mask = get_element_lsbs_mask(es);
uint64_t a0, a1, b0, b1, e0, e1, z0, z1;
uint64_t first_zero = 16;
uint64_t first_inequal;
bool smaller = false;
a0 = s390_vec_read_element64(v2, 0);
a1 = s390_vec_read_element64(v2, 1);
b0 = s390_vec_read_element64(v3, 0);
b1 = s390_vec_read_element64(v3, 1);
e0 = nonzero_search(a0 ^ b0, mask);
e1 = nonzero_search(a1 ^ b1, mask);
first_inequal = match_index(e0, e1);
/* identify the smaller element */
if (first_inequal < 16) {
uint8_t enr = first_inequal / (1 << es);
uint32_t a = s390_vec_read_element(v2, enr, es);
uint32_t b = s390_vec_read_element(v3, enr, es);
smaller = a < b;
}
if (zs) {
z0 = zero_search(a0, mask);
z1 = zero_search(a1, mask);
first_zero = match_index(z0, z1);
}
s390_vec_write_element64(v1, 0, MIN(first_inequal, first_zero));
s390_vec_write_element64(v1, 1, 0);
if (first_zero == 16 && first_inequal == 16) {
return 3;
} else if (first_zero < first_inequal) {
return 0;
}
return smaller ? 1 : 2;
}
#define DEF_VFENE_HELPER(BITS) \
void HELPER(gvec_vfene##BITS)(void *v1, const void *v2, const void *v3, \
uint32_t desc) \
{ \
const bool zs = extract32(simd_data(desc), 1, 1); \
\
vfene(v1, v2, v3, zs, MO_##BITS); \
}
DEF_VFENE_HELPER(8)
DEF_VFENE_HELPER(16)
DEF_VFENE_HELPER(32)
#define DEF_VFENE_CC_HELPER(BITS) \
void HELPER(gvec_vfene_cc##BITS)(void *v1, const void *v2, const void *v3, \
CPUS390XState *env, uint32_t desc) \
{ \
const bool zs = extract32(simd_data(desc), 1, 1); \
\
env->cc_op = vfene(v1, v2, v3, zs, MO_##BITS); \
}
DEF_VFENE_CC_HELPER(8)
DEF_VFENE_CC_HELPER(16)
DEF_VFENE_CC_HELPER(32)