mirror of https://github.com/xemu-project/xemu.git
hw/i386/pc: add max combined fw size as machine configuration option
At Hewlett Packard Inc. we have a need for increased fw size to enable testing of our custom fw.
Rebase v6 patch to d73c46e4
Signed-off-by: Erich McMillan <erich.mcmillan@hp.com>
Message-Id: <20201208155338.14-1-erich.mcmillan@hp.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
parent
552c2c4c10
commit
0657c657eb
51
hw/i386/pc.c
51
hw/i386/pc.c
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@ -1569,6 +1569,50 @@ static void pc_machine_set_max_ram_below_4g(Object *obj, Visitor *v,
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pcms->max_ram_below_4g = value;
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pcms->max_ram_below_4g = value;
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}
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}
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static void pc_machine_get_max_fw_size(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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PCMachineState *pcms = PC_MACHINE(obj);
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uint64_t value = pcms->max_fw_size;
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visit_type_size(v, name, &value, errp);
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}
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static void pc_machine_set_max_fw_size(Object *obj, Visitor *v,
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const char *name, void *opaque,
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Error **errp)
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{
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PCMachineState *pcms = PC_MACHINE(obj);
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Error *error = NULL;
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uint64_t value;
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visit_type_size(v, name, &value, &error);
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if (error) {
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error_propagate(errp, error);
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return;
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}
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/*
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* We don't have a theoretically justifiable exact lower bound on the base
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* address of any flash mapping. In practice, the IO-APIC MMIO range is
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* [0xFEE00000..0xFEE01000] -- see IO_APIC_DEFAULT_ADDRESS --, leaving free
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* only 18MB-4KB below 4G. For now, restrict the cumulative mapping to 8MB in
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* size.
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*/
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if (value > 16 * MiB) {
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error_setg(errp,
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"User specified max allowed firmware size %" PRIu64 " is "
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"greater than 16MiB. If combined firwmare size exceeds "
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"16MiB the system may not boot, or experience intermittent"
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"stability issues.",
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value);
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return;
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}
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pcms->max_fw_size = value;
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}
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static void pc_machine_initfn(Object *obj)
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static void pc_machine_initfn(Object *obj)
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{
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{
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PCMachineState *pcms = PC_MACHINE(obj);
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PCMachineState *pcms = PC_MACHINE(obj);
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@ -1584,6 +1628,7 @@ static void pc_machine_initfn(Object *obj)
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pcms->smbus_enabled = true;
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pcms->smbus_enabled = true;
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pcms->sata_enabled = true;
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pcms->sata_enabled = true;
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pcms->pit_enabled = true;
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pcms->pit_enabled = true;
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pcms->max_fw_size = 8 * MiB;
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#ifdef CONFIG_HPET
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#ifdef CONFIG_HPET
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pcms->hpet_enabled = true;
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pcms->hpet_enabled = true;
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#endif
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#endif
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@ -1710,6 +1755,12 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
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object_class_property_add_bool(oc, "hpet",
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object_class_property_add_bool(oc, "hpet",
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pc_machine_get_hpet, pc_machine_set_hpet);
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pc_machine_get_hpet, pc_machine_set_hpet);
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object_class_property_add(oc, PC_MACHINE_MAX_FW_SIZE, "size",
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pc_machine_get_max_fw_size, pc_machine_set_max_fw_size,
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NULL, NULL);
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object_class_property_set_description(oc, PC_MACHINE_MAX_FW_SIZE,
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"Maximum combined firmware size");
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}
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}
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static const TypeInfo pc_machine_info = {
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static const TypeInfo pc_machine_info = {
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@ -39,15 +39,6 @@
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#include "hw/block/flash.h"
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#include "hw/block/flash.h"
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#include "sysemu/kvm.h"
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#include "sysemu/kvm.h"
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/*
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* We don't have a theoretically justifiable exact lower bound on the base
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* address of any flash mapping. In practice, the IO-APIC MMIO range is
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* [0xFEE00000..0xFEE01000] -- see IO_APIC_DEFAULT_ADDRESS --, leaving free
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* only 18MB-4KB below 4G. For now, restrict the cumulative mapping to 8MB in
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* size.
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*/
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#define FLASH_SIZE_LIMIT (8 * MiB)
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#define FLASH_SECTOR_SIZE 4096
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#define FLASH_SECTOR_SIZE 4096
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static void pc_isa_bios_init(MemoryRegion *rom_memory,
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static void pc_isa_bios_init(MemoryRegion *rom_memory,
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@ -140,7 +131,7 @@ void pc_system_flash_cleanup_unused(PCMachineState *pcms)
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* Stop at the first pcms->flash[0] lacking a block backend.
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* Stop at the first pcms->flash[0] lacking a block backend.
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* Set each flash's size from its block backend. Fatal error if the
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* Set each flash's size from its block backend. Fatal error if the
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* size isn't a non-zero multiple of 4KiB, or the total size exceeds
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* size isn't a non-zero multiple of 4KiB, or the total size exceeds
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* FLASH_SIZE_LIMIT.
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* pcms->max_fw_size.
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*
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*
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* If pcms->flash[0] has a block backend, its memory is passed to
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* If pcms->flash[0] has a block backend, its memory is passed to
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* pc_isa_bios_init(). Merging several flash devices for isa-bios is
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* pc_isa_bios_init(). Merging several flash devices for isa-bios is
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@ -182,10 +173,10 @@ static void pc_system_flash_map(PCMachineState *pcms,
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}
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}
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if ((hwaddr)size != size
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if ((hwaddr)size != size
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|| total_size > HWADDR_MAX - size
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|| total_size > HWADDR_MAX - size
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|| total_size + size > FLASH_SIZE_LIMIT) {
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|| total_size + size > pcms->max_fw_size) {
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error_report("combined size of system firmware exceeds "
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error_report("combined size of system firmware exceeds "
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"%" PRIu64 " bytes",
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"%" PRIu64 " bytes",
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FLASH_SIZE_LIMIT);
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pcms->max_fw_size);
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exit(1);
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exit(1);
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}
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}
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@ -44,6 +44,7 @@ typedef struct PCMachineState {
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bool sata_enabled;
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bool sata_enabled;
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bool pit_enabled;
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bool pit_enabled;
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bool hpet_enabled;
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bool hpet_enabled;
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uint64_t max_fw_size;
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/* NUMA information: */
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/* NUMA information: */
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uint64_t numa_nodes;
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uint64_t numa_nodes;
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@ -60,6 +61,7 @@ typedef struct PCMachineState {
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#define PC_MACHINE_SMBUS "smbus"
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#define PC_MACHINE_SMBUS "smbus"
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#define PC_MACHINE_SATA "sata"
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#define PC_MACHINE_SATA "sata"
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#define PC_MACHINE_PIT "pit"
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#define PC_MACHINE_PIT "pit"
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#define PC_MACHINE_MAX_FW_SIZE "max-fw-size"
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/**
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/**
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* PCMachineClass:
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* PCMachineClass:
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