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target-microblaze: dec_msr: Plug a temp leak
Plug a temp leak. Reported-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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@ -516,12 +516,17 @@ static void dec_msr(DisasContext *dc)
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#if !defined(CONFIG_USER_ONLY)
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#if !defined(CONFIG_USER_ONLY)
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/* Catch read/writes to the mmu block. */
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/* Catch read/writes to the mmu block. */
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if ((sr & ~0xff) == 0x1000) {
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if ((sr & ~0xff) == 0x1000) {
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TCGv_i32 tmp_sr;
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sr &= 7;
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sr &= 7;
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tmp_sr = tcg_const_i32(sr);
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LOG_DIS("m%ss sr%d r%d imm=%x\n", to ? "t" : "f", sr, dc->ra, dc->imm);
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LOG_DIS("m%ss sr%d r%d imm=%x\n", to ? "t" : "f", sr, dc->ra, dc->imm);
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if (to)
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if (to) {
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gen_helper_mmu_write(cpu_env, tcg_const_i32(sr), cpu_R[dc->ra]);
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gen_helper_mmu_write(cpu_env, tmp_sr, cpu_R[dc->ra]);
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else
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} else {
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gen_helper_mmu_read(cpu_R[dc->rd], cpu_env, tcg_const_i32(sr));
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gen_helper_mmu_read(cpu_R[dc->rd], cpu_env, tmp_sr);
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}
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tcg_temp_free_i32(tmp_sr);
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return;
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return;
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}
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}
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#endif
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#endif
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