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target/m68k: Explicitly set 2-NaN propagation rule 

Explicitly set the 2-NaN propagation rule on env->fp_status
and on the temporary fp_status that we use in frem (since
we pass that to a division operation function).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Peter Maydell 2024-11-05 10:09:54 +00:00
parent 5aaab56a1a
commit 0527cfd94c
3 changed files with 18 additions and 18 deletions
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19
fpu/softfloat-specialize.c.inc
View File

@ -404,25 +404,8 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls,
|| defined(TARGET_RISCV) || defined(TARGET_SH4) \
|| defined(TARGET_TRICORE) || defined(TARGET_ARM) || defined(TARGET_MIPS) \
|| defined(TARGET_LOONGARCH64) || defined(TARGET_HPPA) \
|| defined(TARGET_S390X) || defined(TARGET_PPC)
|| defined(TARGET_S390X) || defined(TARGET_PPC) || defined(TARGET_M68K)
g_assert_not_reached();
#elif defined(TARGET_M68K)
/*
* M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL
* 3.4 FLOATING-POINT INSTRUCTION DETAILS
* If either operand, but not both operands, of an operation is a
* nonsignaling NaN, then that NaN is returned as the result. If both
* operands are nonsignaling NaNs, then the destination operand
* nonsignaling NaN is returned as the result.
* If either operand to an operation is a signaling NaN (SNaN), then the
* SNaN bit is set in the FPSR EXC byte. If the SNaN exception enable bit
* is set in the FPCR ENABLE byte, then the exception is taken and the
* destination is not modified. If the SNaN exception enable bit is not
* set, setting the SNaN bit in the operand to a one converts the SNaN to
* a nonsignaling NaN. The operation then continues as described in the
* preceding paragraph for nonsignaling NaNs.
*/
rule = float_2nan_prop_ab;
#elif defined(TARGET_SPARC)
/* Prefer SNaN over QNaN, order B then A. */
rule = float_2nan_prop_s_ba;

16
target/m68k/cpu.c
View File

@ -93,6 +93,22 @@ static void m68k_cpu_reset_hold(Object *obj, ResetType type)
env->fregs[i].d = nan;
}
cpu_m68k_set_fpcr(env, 0);
/*
* M68000 FAMILY PROGRAMMER'S REFERENCE MANUAL
* 3.4 FLOATING-POINT INSTRUCTION DETAILS
* If either operand, but not both operands, of an operation is a
* nonsignaling NaN, then that NaN is returned as the result. If both
* operands are nonsignaling NaNs, then the destination operand
* nonsignaling NaN is returned as the result.
* If either operand to an operation is a signaling NaN (SNaN), then the
* SNaN bit is set in the FPSR EXC byte. If the SNaN exception enable bit
* is set in the FPCR ENABLE byte, then the exception is taken and the
* destination is not modified. If the SNaN exception enable bit is not
* set, setting the SNaN bit in the operand to a one converts the SNaN to
* a nonsignaling NaN. The operation then continues as described in the
* preceding paragraph for nonsignaling NaNs.
*/
set_float_2nan_prop_rule(float_2nan_prop_ab, &env->fp_status);
env->fpsr = 0;
/* TODO: We should set PC from the interrupt vector. */

1
target/m68k/fpu_helper.c
View File

@ -620,6 +620,7 @@ void HELPER(frem)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
int sign;
/* Calculate quotient directly using round to nearest mode */
set_float_2nan_prop_rule(float_2nan_prop_ab, &fp_status);
set_float_rounding_mode(float_round_nearest_even, &fp_status);
set_floatx80_rounding_precision(
get_floatx80_rounding_precision(&env->fp_status), &fp_status);