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Merge remote-tracking branch 'origin/master' into staging 

* origin/master:
  linux-user: ARM: Ignore immediate value for svc in thumb mode
  linux-user: Use init_guest_space when -R and -B are specified
  linux-user: Factor out guest space probing into a function
  flatload: fix bss clearing
  linux-user: make host_to_target_cmsg support SO_TIMESTAMP cmsg_type
  linux-user: make do_setsockopt support SOL_RAW ICMP_FILTER socket option
  linux-user: pass sockaddr from host to target
  x86: switch to AREG0 free mode
  x86: avoid AREG0 in segmentation helpers
  x86: avoid AREG0 for misc helpers
  x86: use wrappers for memory access helpers
  x86: avoid AREG0 for SMM helpers
  x86: avoid AREG0 for SVM helpers
  x86: avoid AREG0 for integer helpers
  x86: avoid AREG0 for condition code helpers
  x86: avoid AREG0 for FPU helpers
  linux-user: Move target_to_host_errno_table[] setup out of ioctl loop
  linux-user: Fix SNDCTL_DSP_MAP{IN, OUT}BUF ioctl definitions
  linux-user: Fix incorrect TARGET_BLKBSZGET, TARGET_BLKBSZSET
This commit is contained in:
Anthony Liguori 2012-08-14 15:19:50 -05:00
parent 28a9a00e95 873359d411
commit 03834e22ab
25 changed files with 1977 additions and 1791 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
configure vendored
View File

@ -3778,7 +3778,7 @@ symlink "$source_path/Makefile.target" "$target_dir/Makefile"
case "$target_arch2" in case "$target_arch2" in
alpha | or32 | sparc* | xtensa* | ppc*) alpha | i386 | or32 | sparc* | x86_64 | xtensa* | ppc*)
echo "CONFIG_TCG_PASS_AREG0=y" >> $config_target_mak echo "CONFIG_TCG_PASS_AREG0=y" >> $config_target_mak
;; ;;
esac esac

22
cpu-all.h
View File

@ -274,6 +274,28 @@ extern unsigned long reserved_va;
#define cpu_ldsw_code(env1, p) ldsw_raw(p) #define cpu_ldsw_code(env1, p) ldsw_raw(p)
#define cpu_ldl_code(env1, p) ldl_raw(p) #define cpu_ldl_code(env1, p) ldl_raw(p)
#define cpu_ldq_code(env1, p) ldq_raw(p) #define cpu_ldq_code(env1, p) ldq_raw(p)
#define cpu_ldub_data(env, addr) ldub_raw(addr)
#define cpu_lduw_data(env, addr) lduw_raw(addr)
#define cpu_ldsw_data(env, addr) ldsw_raw(addr)
#define cpu_ldl_data(env, addr) ldl_raw(addr)
#define cpu_ldq_data(env, addr) ldq_raw(addr)
#define cpu_stb_data(env, addr, data) stb_raw(addr, data)
#define cpu_stw_data(env, addr, data) stw_raw(addr, data)
#define cpu_stl_data(env, addr, data) stl_raw(addr, data)
#define cpu_stq_data(env, addr, data) stq_raw(addr, data)
#define cpu_ldub_kernel(env, addr) ldub_raw(addr)
#define cpu_lduw_kernel(env, addr) lduw_raw(addr)
#define cpu_ldsw_kernel(env, addr) ldsw_raw(addr)
#define cpu_ldl_kernel(env, addr) ldl_raw(addr)
#define cpu_ldq_kernel(env, addr) ldq_raw(addr)
#define cpu_stb_kernel(env, addr, data) stb_raw(addr, data)
#define cpu_stw_kernel(env, addr, data) stw_raw(addr, data)
#define cpu_stl_kernel(env, addr, data) stl_raw(addr, data)
#define cpu_stq_kernel(env, addr, data) stq_raw(addr, data)
#endif #endif
#define ldub_kernel(p) ldub_raw(p) #define ldub_kernel(p) ldub_raw(p)

161
linux-user/elfload.c
View File

@ -332,9 +332,17 @@ enum
ARM_HWCAP_ARM_VFPv3D16 = 1 << 13, ARM_HWCAP_ARM_VFPv3D16 = 1 << 13,
}; };
#define TARGET_HAS_GUEST_VALIDATE_BASE #define TARGET_HAS_VALIDATE_GUEST_SPACE
/* We want the opportunity to check the suggested base */ /* Return 1 if the proposed guest space is suitable for the guest.
bool guest_validate_base(unsigned long guest_base) * Return 0 if the proposed guest space isn't suitable, but another
* address space should be tried.
* Return -1 if there is no way the proposed guest space can be
* valid regardless of the base.
* The guest code may leave a page mapped and populate it if the
* address is suitable.
*/
static int validate_guest_space(unsigned long guest_base,
unsigned long guest_size)
{ {
unsigned long real_start, test_page_addr; unsigned long real_start, test_page_addr;
@ -342,6 +350,15 @@ bool guest_validate_base(unsigned long guest_base)
* commpage at 0xffff0fxx * commpage at 0xffff0fxx
*/ */
test_page_addr = guest_base + (0xffff0f00 & qemu_host_page_mask); test_page_addr = guest_base + (0xffff0f00 & qemu_host_page_mask);
/* If the commpage lies within the already allocated guest space,
* then there is no way we can allocate it.
*/
if (test_page_addr >= guest_base
&& test_page_addr <= (guest_base + guest_size)) {
return -1;
}
/* Note it needs to be writeable to let us initialise it */ /* Note it needs to be writeable to let us initialise it */
real_start = (unsigned long) real_start = (unsigned long)
mmap((void *)test_page_addr, qemu_host_page_size, mmap((void *)test_page_addr, qemu_host_page_size,
@ -1418,14 +1435,105 @@ static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc,
return sp; return sp;
} }
#ifndef TARGET_HAS_GUEST_VALIDATE_BASE #ifndef TARGET_HAS_VALIDATE_GUEST_SPACE
/* If the guest doesn't have a validation function just agree */ /* If the guest doesn't have a validation function just agree */
bool guest_validate_base(unsigned long guest_base) static int validate_guest_space(unsigned long guest_base,
unsigned long guest_size)
{ {
return 1; return 1;
} }
#endif #endif
unsigned long init_guest_space(unsigned long host_start,
unsigned long host_size,
unsigned long guest_start,
bool fixed)
{
unsigned long current_start, real_start;
int flags;
assert(host_start || host_size);
/* If just a starting address is given, then just verify that
* address. */
if (host_start && !host_size) {
if (validate_guest_space(host_start, host_size) == 1) {
return host_start;
} else {
return (unsigned long)-1;
}
}
/* Setup the initial flags and start address. */
current_start = host_start & qemu_host_page_mask;
flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE;
if (fixed) {
flags |= MAP_FIXED;
}
/* Otherwise, a non-zero size region of memory needs to be mapped
* and validated. */
while (1) {
unsigned long real_size = host_size;
/* Do not use mmap_find_vma here because that is limited to the
* guest address space. We are going to make the
* guest address space fit whatever we're given.
*/
real_start = (unsigned long)
mmap((void *)current_start, host_size, PROT_NONE, flags, -1, 0);
if (real_start == (unsigned long)-1) {
return (unsigned long)-1;
}
/* Ensure the address is properly aligned. */
if (real_start & ~qemu_host_page_mask) {
munmap((void *)real_start, host_size);
real_size = host_size + qemu_host_page_size;
real_start = (unsigned long)
mmap((void *)real_start, real_size, PROT_NONE, flags, -1, 0);
if (real_start == (unsigned long)-1) {
return (unsigned long)-1;
}
real_start = HOST_PAGE_ALIGN(real_start);
}
/* Check to see if the address is valid. */
if (!host_start || real_start == current_start) {
int valid = validate_guest_space(real_start - guest_start,
real_size);
if (valid == 1) {
break;
} else if (valid == -1) {
return (unsigned long)-1;
}
/* valid == 0, so try again. */
}
/* That address didn't work. Unmap and try a different one.
* The address the host picked because is typically right at
* the top of the host address space and leaves the guest with
* no usable address space. Resort to a linear search. We
* already compensated for mmap_min_addr, so this should not
* happen often. Probably means we got unlucky and host
* address space randomization put a shared library somewhere
* inconvenient.
*/
munmap((void *)real_start, host_size);
current_start += qemu_host_page_size;
if (host_start == current_start) {
/* Theoretically possible if host doesn't have any suitably
* aligned areas. Normally the first mmap will fail.
*/
return (unsigned long)-1;
}
}
qemu_log("Reserved 0x%lx bytes of guest address space\n", host_size);
return real_start;
}
static void probe_guest_base(const char *image_name, static void probe_guest_base(const char *image_name,
abi_ulong loaddr, abi_ulong hiaddr) abi_ulong loaddr, abi_ulong hiaddr)
{ {
@ -1452,46 +1560,23 @@ static void probe_guest_base(const char *image_name,
} }
} }
host_size = hiaddr - loaddr; host_size = hiaddr - loaddr;
while (1) {
/* Do not use mmap_find_vma here because that is limited to the /* Setup the initial guest memory space with ranges gleaned from
guest address space. We are going to make the * the ELF image that is being loaded.
guest address space fit whatever we're given. */ */
real_start = (unsigned long) real_start = init_guest_space(host_start, host_size, loaddr, false);
mmap((void *)host_start, host_size, PROT_NONE, if (real_start == (unsigned long)-1) {
MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE, -1, 0); errmsg = "Unable to find space for application";
if (real_start == (unsigned long)-1) { goto exit_errmsg;
goto exit_perror;
}
guest_base = real_start - loaddr;
if ((real_start == host_start) &&
guest_validate_base(guest_base)) {
break;
}
/* That address didn't work. Unmap and try a different one.
The address the host picked because is typically right at
the top of the host address space and leaves the guest with
no usable address space. Resort to a linear search. We
already compensated for mmap_min_addr, so this should not
happen often. Probably means we got unlucky and host
address space randomization put a shared library somewhere
inconvenient. */
munmap((void *)real_start, host_size);
host_start += qemu_host_page_size;
if (host_start == loaddr) {
/* Theoretically possible if host doesn't have any suitably
aligned areas. Normally the first mmap will fail. */
errmsg = "Unable to find space for application";
goto exit_errmsg;
}
} }
guest_base = real_start - loaddr;
qemu_log("Relocating guest address space from 0x" qemu_log("Relocating guest address space from 0x"
TARGET_ABI_FMT_lx " to 0x%lx\n", TARGET_ABI_FMT_lx " to 0x%lx\n",
loaddr, real_start); loaddr, real_start);
} }
return; return;
exit_perror:
errmsg = strerror(errno);
exit_errmsg: exit_errmsg:
fprintf(stderr, "%s: %s\n", image_name, errmsg); fprintf(stderr, "%s: %s\n", image_name, errmsg);
exit(-1); exit(-1);

2
linux-user/flatload.c
View File

@ -660,7 +660,7 @@ static int load_flat_file(struct linux_binprm * bprm,
} }
/* zero the BSS. */ /* zero the BSS. */
memset((void *)((unsigned long)datapos + data_len), 0, bss_len); memset(g2h(datapos + data_len), 0, bss_len);
return 0; return 0;
} }

4
linux-user/ioctls.h
View File

@ -186,8 +186,8 @@
IOCTL(SNDCTL_DSP_GETISPACE, IOC_R, MK_PTR(MK_STRUCT(STRUCT_audio_buf_info))) IOCTL(SNDCTL_DSP_GETISPACE, IOC_R, MK_PTR(MK_STRUCT(STRUCT_audio_buf_info)))
IOCTL(SNDCTL_DSP_GETOSPACE, IOC_R, MK_PTR(MK_STRUCT(STRUCT_audio_buf_info))) IOCTL(SNDCTL_DSP_GETOSPACE, IOC_R, MK_PTR(MK_STRUCT(STRUCT_audio_buf_info)))
IOCTL(SNDCTL_DSP_GETTRIGGER, IOC_R, MK_PTR(TYPE_INT)) IOCTL(SNDCTL_DSP_GETTRIGGER, IOC_R, MK_PTR(TYPE_INT))
IOCTL(SNDCTL_DSP_MAPINBUF, IOC_R, MK_PTR(TYPE_INT)) IOCTL(SNDCTL_DSP_MAPINBUF, IOC_R, MK_PTR(MK_STRUCT(STRUCT_buffmem_desc)))
IOCTL(SNDCTL_DSP_MAPOUTBUF, IOC_R, MK_PTR(TYPE_INT)) IOCTL(SNDCTL_DSP_MAPOUTBUF, IOC_R, MK_PTR(MK_STRUCT(STRUCT_buffmem_desc)))
IOCTL(SNDCTL_DSP_NONBLOCK, 0, TYPE_NULL) IOCTL(SNDCTL_DSP_NONBLOCK, 0, TYPE_NULL)
IOCTL(SNDCTL_DSP_POST, 0, TYPE_NULL) IOCTL(SNDCTL_DSP_POST, 0, TYPE_NULL)
IOCTL(SNDCTL_DSP_RESET, 0, TYPE_NULL) IOCTL(SNDCTL_DSP_RESET, 0, TYPE_NULL)

38
linux-user/main.c
View File

@ -822,8 +822,7 @@ void cpu_loop(CPUARMState *env)
} else if (n == ARM_NR_semihosting } else if (n == ARM_NR_semihosting
|| n == ARM_NR_thumb_semihosting) { || n == ARM_NR_thumb_semihosting) {
env->regs[0] = do_arm_semihosting (env); env->regs[0] = do_arm_semihosting (env);
} else if (n == 0 || n >= ARM_SYSCALL_BASE } else if (n == 0 || n >= ARM_SYSCALL_BASE || env->thumb) {
|| (env->thumb && n == ARM_THUMB_SYSCALL)) {
/* linux syscall */ /* linux syscall */
if (env->thumb || n == 0) { if (env->thumb || n == 0) {
n = env->regs[7]; n = env->regs[7];
@ -3516,39 +3515,16 @@ int main(int argc, char **argv, char **envp)
*/ */
guest_base = HOST_PAGE_ALIGN(guest_base); guest_base = HOST_PAGE_ALIGN(guest_base);
if (reserved_va) { if (reserved_va || have_guest_base) {
void *p; guest_base = init_guest_space(guest_base, reserved_va, 0,
int flags; have_guest_base);
if (guest_base == (unsigned long)-1) {
flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE;
if (have_guest_base) {
flags |= MAP_FIXED;
}
p = mmap((void *)guest_base, reserved_va, PROT_NONE, flags, -1, 0);
if (p == MAP_FAILED) {
fprintf(stderr, "Unable to reserve guest address space\n"); fprintf(stderr, "Unable to reserve guest address space\n");
exit(1); exit(1);
} }
guest_base = (unsigned long)p;
/* Make sure the address is properly aligned. */
if (guest_base & ~qemu_host_page_mask) {
munmap(p, reserved_va);
p = mmap((void *)guest_base, reserved_va + qemu_host_page_size,
PROT_NONE, flags, -1, 0);
if (p == MAP_FAILED) {
fprintf(stderr, "Unable to reserve guest address space\n");
exit(1);
}
guest_base = HOST_PAGE_ALIGN((unsigned long)p);
}
qemu_log("Reserved 0x%lx bytes of guest address space\n", reserved_va);
mmap_next_start = reserved_va;
}
if (reserved_va || have_guest_base) { if (reserved_va) {
if (!guest_validate_base(guest_base)) { mmap_next_start = reserved_va;
fprintf(stderr, "Guest base/Reserved VA rejected by guest code\n");
exit(1);
} }
} }
#endif /* CONFIG_USE_GUEST_BASE */ #endif /* CONFIG_USE_GUEST_BASE */

15
linux-user/qemu.h
View File

@ -204,11 +204,18 @@ int get_osversion(void);
void fork_start(void); void fork_start(void);
void fork_end(int child); void fork_end(int child);
/* Return true if the proposed guest_base is suitable for the guest. /* Creates the initial guest address space in the host memory space using
* The guest code may leave a page mapped and populate it if the * the given host start address hint and size. The guest_start parameter
* address is suitable. * specifies the start address of the guest space. guest_base will be the
* difference between the host start address computed by this function and
* guest_start. If fixed is specified, then the mapped address space must
* start at host_start. The real start address of the mapped memory space is
* returned or -1 if there was an error.
*/ */
bool guest_validate_base(unsigned long guest_base); unsigned long init_guest_space(unsigned long host_start,
unsigned long host_size,
unsigned long guest_start,
bool fixed);
#include "qemu-log.h" #include "qemu-log.h"

67
linux-user/syscall.c
View File

@ -60,6 +60,7 @@ int __clone2(int (*fn)(void *), void *child_stack_base,
#include <netinet/ip.h> #include <netinet/ip.h>
#include <netinet/tcp.h> #include <netinet/tcp.h>
#include <linux/wireless.h> #include <linux/wireless.h>
#include <linux/icmp.h>
#include "qemu-common.h" #include "qemu-common.h"
#ifdef TARGET_GPROF #ifdef TARGET_GPROF
#include <sys/gmon.h> #include <sys/gmon.h>
@ -1268,7 +1269,6 @@ static inline abi_long host_to_target_sockaddr(abi_ulong target_addr,
return 0; return 0;
} }
/* ??? Should this also swap msgh->name? */
static inline abi_long target_to_host_cmsg(struct msghdr *msgh, static inline abi_long target_to_host_cmsg(struct msghdr *msgh,
struct target_msghdr *target_msgh) struct target_msghdr *target_msgh)
{ {
@ -1325,7 +1325,6 @@ static inline abi_long target_to_host_cmsg(struct msghdr *msgh,
return 0; return 0;
} }
/* ??? Should this also swap msgh->name? */
static inline abi_long host_to_target_cmsg(struct target_msghdr *target_msgh, static inline abi_long host_to_target_cmsg(struct target_msghdr *target_msgh,
struct msghdr *msgh) struct msghdr *msgh)
{ {
@ -1360,16 +1359,28 @@ static inline abi_long host_to_target_cmsg(struct target_msghdr *target_msgh,
target_cmsg->cmsg_type = tswap32(cmsg->cmsg_type); target_cmsg->cmsg_type = tswap32(cmsg->cmsg_type);
target_cmsg->cmsg_len = tswapal(TARGET_CMSG_LEN(len)); target_cmsg->cmsg_len = tswapal(TARGET_CMSG_LEN(len));
if (cmsg->cmsg_level != TARGET_SOL_SOCKET || cmsg->cmsg_type != SCM_RIGHTS) { if ((cmsg->cmsg_level == TARGET_SOL_SOCKET) &&
gemu_log("Unsupported ancillary data: %d/%d\n", cmsg->cmsg_level, cmsg->cmsg_type); (cmsg->cmsg_type == SCM_RIGHTS)) {
memcpy(target_data, data, len);
} else {
int *fd = (int *)data; int *fd = (int *)data;
int *target_fd = (int *)target_data; int *target_fd = (int *)target_data;
int i, numfds = len / sizeof(int); int i, numfds = len / sizeof(int);
for (i = 0; i < numfds; i++) for (i = 0; i < numfds; i++)
target_fd[i] = tswap32(fd[i]); target_fd[i] = tswap32(fd[i]);
} else if ((cmsg->cmsg_level == TARGET_SOL_SOCKET) &&
(cmsg->cmsg_type == SO_TIMESTAMP) &&
(len == sizeof(struct timeval))) {
/* copy struct timeval to target */
struct timeval *tv = (struct timeval *)data;
struct target_timeval *target_tv =
(struct target_timeval *)target_data;
target_tv->tv_sec = tswapal(tv->tv_sec);
target_tv->tv_usec = tswapal(tv->tv_usec);
} else {
gemu_log("Unsupported ancillary data: %d/%d\n",
cmsg->cmsg_level, cmsg->cmsg_type);
memcpy(target_data, data, len);
} }
cmsg = CMSG_NXTHDR(msgh, cmsg); cmsg = CMSG_NXTHDR(msgh, cmsg);
@ -1450,6 +1461,25 @@ static abi_long do_setsockopt(int sockfd, int level, int optname,
unlock_user (ip_mreq_source, optval_addr, 0); unlock_user (ip_mreq_source, optval_addr, 0);
break; break;
default:
goto unimplemented;
}
break;
case SOL_RAW:
switch (optname) {
case ICMP_FILTER:
/* struct icmp_filter takes an u32 value */
if (optlen < sizeof(uint32_t)) {
return -TARGET_EINVAL;
}
if (get_user_u32(val, optval_addr)) {
return -TARGET_EFAULT;
}
ret = get_errno(setsockopt(sockfd, level, optname,
&val, sizeof(val)));
break;
default: default:
goto unimplemented; goto unimplemented;
} }
@ -1885,10 +1915,22 @@ static abi_long do_sendrecvmsg(int fd, abi_ulong target_msg,
if (!is_error(ret)) { if (!is_error(ret)) {
len = ret; len = ret;
ret = host_to_target_cmsg(msgp, &msg); ret = host_to_target_cmsg(msgp, &msg);
if (!is_error(ret)) if (!is_error(ret)) {
msgp->msg_namelen = tswap32(msg.msg_namelen);
if (msg.msg_name != NULL) {
ret = host_to_target_sockaddr(tswapal(msgp->msg_name),
msg.msg_name, msg.msg_namelen);
if (ret) {
goto out;
}
}
ret = len; ret = len;
}
} }
} }
out:
unlock_iovec(vec, target_vec, count, !send); unlock_iovec(vec, target_vec, count, !send);
unlock_user_struct(msgp, target_msg, send ? 0 : 1); unlock_user_struct(msgp, target_msg, send ? 0 : 1);
return ret; return ret;
@ -4606,6 +4648,12 @@ void syscall_init(void)
#undef STRUCT #undef STRUCT
#undef STRUCT_SPECIAL #undef STRUCT_SPECIAL
/* Build target_to_host_errno_table[] table from
* host_to_target_errno_table[]. */
for (i = 0; i < ERRNO_TABLE_SIZE; i++) {
target_to_host_errno_table[host_to_target_errno_table[i]] = i;
}
/* we patch the ioctl size if necessary. We rely on the fact that /* we patch the ioctl size if necessary. We rely on the fact that
no ioctl has all the bits at '1' in the size field */ no ioctl has all the bits at '1' in the size field */
ie = ioctl_entries; ie = ioctl_entries;
@ -4625,11 +4673,6 @@ void syscall_init(void)
(size << TARGET_IOC_SIZESHIFT); (size << TARGET_IOC_SIZESHIFT);
} }
/* Build target_to_host_errno_table[] table from
* host_to_target_errno_table[]. */
for (i=0; i < ERRNO_TABLE_SIZE; i++)
target_to_host_errno_table[host_to_target_errno_table[i]] = i;
/* automatic consistency check if same arch */ /* automatic consistency check if same arch */
#if (defined(__i386__) && defined(TARGET_I386) && defined(TARGET_ABI32)) || \ #if (defined(__i386__) && defined(TARGET_I386) && defined(TARGET_ABI32)) || \
(defined(__x86_64__) && defined(TARGET_X86_64)) (defined(__x86_64__) && defined(TARGET_X86_64))

8
linux-user/syscall_defs.h
View File

@ -880,8 +880,8 @@ struct target_pollfd {
#define TARGET_BLKSECTGET TARGET_IO(0x12,103)/* get max sectors per request (ll_rw_blk.c) */ #define TARGET_BLKSECTGET TARGET_IO(0x12,103)/* get max sectors per request (ll_rw_blk.c) */
#define TARGET_BLKSSZGET TARGET_IO(0x12,104)/* get block device sector size */ #define TARGET_BLKSSZGET TARGET_IO(0x12,104)/* get block device sector size */
/* A jump here: 108-111 have been used for various private purposes. */ /* A jump here: 108-111 have been used for various private purposes. */
#define TARGET_BLKBSZGET TARGET_IOR(0x12,112,int) #define TARGET_BLKBSZGET TARGET_IOR(0x12, 112, abi_ulong)
#define TARGET_BLKBSZSET TARGET_IOW(0x12,113,int) #define TARGET_BLKBSZSET TARGET_IOW(0x12, 113, abi_ulong)
#define TARGET_BLKGETSIZE64 TARGET_IOR(0x12,114,abi_ulong) #define TARGET_BLKGETSIZE64 TARGET_IOR(0x12,114,abi_ulong)
/* return device size in bytes /* return device size in bytes
(u64 *arg) */ (u64 *arg) */
@ -2226,8 +2226,8 @@ struct target_eabi_flock64 {
#define TARGET_SNDCTL_DSP_GETTRIGGER TARGET_IOR('P',16, int) #define TARGET_SNDCTL_DSP_GETTRIGGER TARGET_IOR('P',16, int)
#define TARGET_SNDCTL_DSP_GETIPTR TARGET_IORU('P',17) #define TARGET_SNDCTL_DSP_GETIPTR TARGET_IORU('P',17)
#define TARGET_SNDCTL_DSP_GETOPTR TARGET_IORU('P',18) #define TARGET_SNDCTL_DSP_GETOPTR TARGET_IORU('P',18)
#define TARGET_SNDCTL_DSP_MAPINBUF 0x80085013 #define TARGET_SNDCTL_DSP_MAPINBUF TARGET_IORU('P', 19)
#define TARGET_SNDCTL_DSP_MAPOUTBUF 0x80085014 #define TARGET_SNDCTL_DSP_MAPOUTBUF TARGET_IORU('P', 20)
#define TARGET_SNDCTL_DSP_NONBLOCK 0x0000500e #define TARGET_SNDCTL_DSP_NONBLOCK 0x0000500e
#define TARGET_SNDCTL_DSP_SAMPLESIZE 0xc0045005 #define TARGET_SNDCTL_DSP_SAMPLESIZE 0xc0045005
#define TARGET_SNDCTL_DSP_SETDUPLEX 0x00005016 #define TARGET_SNDCTL_DSP_SETDUPLEX 0x00005016

3
linux-user/syscall_types.h
View File

@ -77,6 +77,9 @@ STRUCT(audio_buf_info,
STRUCT(count_info, STRUCT(count_info,
TYPE_INT, TYPE_INT, TYPE_INT) TYPE_INT, TYPE_INT, TYPE_INT)
STRUCT(buffmem_desc,
TYPE_PTRVOID, TYPE_INT)
STRUCT(mixer_info, STRUCT(mixer_info,
MK_ARRAY(TYPE_CHAR, 16), MK_ARRAY(TYPE_CHAR, 32), TYPE_INT, MK_ARRAY(TYPE_INT, 10)) MK_ARRAY(TYPE_CHAR, 16), MK_ARRAY(TYPE_CHAR, 32), TYPE_INT, MK_ARRAY(TYPE_INT, 10))

9
target-i386/Makefile.objs
View File

@ -6,12 +6,3 @@ obj-$(CONFIG_KVM) += kvm.o hyperv.o
obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-$(CONFIG_NO_KVM) += kvm-stub.o
obj-$(CONFIG_LINUX_USER) += ioport-user.o obj-$(CONFIG_LINUX_USER) += ioport-user.o
obj-$(CONFIG_BSD_USER) += ioport-user.o obj-$(CONFIG_BSD_USER) += ioport-user.o
$(obj)/fpu_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/cc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/int_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/svm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/smm_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/misc_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/mem_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
$(obj)/seg_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)

199
target-i386/cc_helper.c
View File

@ -18,7 +18,6 @@
*/ */
#include "cpu.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h" #include "helper.h"
const uint8_t parity_table[256] = { const uint8_t parity_table[256] = {
@ -76,184 +75,177 @@ const uint8_t parity_table[256] = {
#endif #endif
static int compute_all_eflags(void) static int compute_all_eflags(CPUX86State *env)
{ {
return CC_SRC; return CC_SRC;
} }
static int compute_c_eflags(void) static int compute_c_eflags(CPUX86State *env)
{ {
return CC_SRC & CC_C; return CC_SRC & CC_C;
} }
uint32_t helper_cc_compute_all(int op) uint32_t helper_cc_compute_all(CPUX86State *env, int op)
{ {
switch (op) { switch (op) {
default: /* should never happen */ default: /* should never happen */
return 0; return 0;
case CC_OP_EFLAGS: case CC_OP_EFLAGS:
return compute_all_eflags(); return compute_all_eflags(env);
case CC_OP_MULB: case CC_OP_MULB:
return compute_all_mulb(); return compute_all_mulb(env);
case CC_OP_MULW: case CC_OP_MULW:
return compute_all_mulw(); return compute_all_mulw(env);
case CC_OP_MULL: case CC_OP_MULL:
return compute_all_mull(); return compute_all_mull(env);
case CC_OP_ADDB: case CC_OP_ADDB:
return compute_all_addb(); return compute_all_addb(env);
case CC_OP_ADDW: case CC_OP_ADDW:
return compute_all_addw(); return compute_all_addw(env);
case CC_OP_ADDL: case CC_OP_ADDL:
return compute_all_addl(); return compute_all_addl(env);
case CC_OP_ADCB: case CC_OP_ADCB:
return compute_all_adcb(); return compute_all_adcb(env);
case CC_OP_ADCW: case CC_OP_ADCW:
return compute_all_adcw(); return compute_all_adcw(env);
case CC_OP_ADCL: case CC_OP_ADCL:
return compute_all_adcl(); return compute_all_adcl(env);
case CC_OP_SUBB: case CC_OP_SUBB:
return compute_all_subb(); return compute_all_subb(env);
case CC_OP_SUBW: case CC_OP_SUBW:
return compute_all_subw(); return compute_all_subw(env);
case CC_OP_SUBL: case CC_OP_SUBL:
return compute_all_subl(); return compute_all_subl(env);
case CC_OP_SBBB: case CC_OP_SBBB:
return compute_all_sbbb(); return compute_all_sbbb(env);
case CC_OP_SBBW: case CC_OP_SBBW:
return compute_all_sbbw(); return compute_all_sbbw(env);
case CC_OP_SBBL: case CC_OP_SBBL:
return compute_all_sbbl(); return compute_all_sbbl(env);
case CC_OP_LOGICB: case CC_OP_LOGICB:
return compute_all_logicb(); return compute_all_logicb(env);
case CC_OP_LOGICW: case CC_OP_LOGICW:
return compute_all_logicw(); return compute_all_logicw(env);
case CC_OP_LOGICL: case CC_OP_LOGICL:
return compute_all_logicl(); return compute_all_logicl(env);
case CC_OP_INCB: case CC_OP_INCB:
return compute_all_incb(); return compute_all_incb(env);
case CC_OP_INCW: case CC_OP_INCW:
return compute_all_incw(); return compute_all_incw(env);
case CC_OP_INCL: case CC_OP_INCL:
return compute_all_incl(); return compute_all_incl(env);
case CC_OP_DECB: case CC_OP_DECB:
return compute_all_decb(); return compute_all_decb(env);
case CC_OP_DECW: case CC_OP_DECW:
return compute_all_decw(); return compute_all_decw(env);
case CC_OP_DECL: case CC_OP_DECL:
return compute_all_decl(); return compute_all_decl(env);
case CC_OP_SHLB: case CC_OP_SHLB:
return compute_all_shlb(); return compute_all_shlb(env);
case CC_OP_SHLW: case CC_OP_SHLW:
return compute_all_shlw(); return compute_all_shlw(env);
case CC_OP_SHLL: case CC_OP_SHLL:
return compute_all_shll(); return compute_all_shll(env);
case CC_OP_SARB: case CC_OP_SARB:
return compute_all_sarb(); return compute_all_sarb(env);
case CC_OP_SARW: case CC_OP_SARW:
return compute_all_sarw(); return compute_all_sarw(env);
case CC_OP_SARL: case CC_OP_SARL:
return compute_all_sarl(); return compute_all_sarl(env);
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
case CC_OP_MULQ: case CC_OP_MULQ:
return compute_all_mulq(); return compute_all_mulq(env);
case CC_OP_ADDQ: case CC_OP_ADDQ:
return compute_all_addq(); return compute_all_addq(env);
case CC_OP_ADCQ: case CC_OP_ADCQ:
return compute_all_adcq(); return compute_all_adcq(env);
case CC_OP_SUBQ: case CC_OP_SUBQ:
return compute_all_subq(); return compute_all_subq(env);
case CC_OP_SBBQ: case CC_OP_SBBQ:
return compute_all_sbbq(); return compute_all_sbbq(env);
case CC_OP_LOGICQ: case CC_OP_LOGICQ:
return compute_all_logicq(); return compute_all_logicq(env);
case CC_OP_INCQ: case CC_OP_INCQ:
return compute_all_incq(); return compute_all_incq(env);
case CC_OP_DECQ: case CC_OP_DECQ:
return compute_all_decq(); return compute_all_decq(env);
case CC_OP_SHLQ: case CC_OP_SHLQ:
return compute_all_shlq(); return compute_all_shlq(env);
case CC_OP_SARQ: case CC_OP_SARQ:
return compute_all_sarq(); return compute_all_sarq(env);
#endif #endif
} }
} }
uint32_t cpu_cc_compute_all(CPUX86State *env1, int op) uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
{ {
CPUX86State *saved_env; return helper_cc_compute_all(env, op);
uint32_t ret;
saved_env = env;
env = env1;
ret = helper_cc_compute_all(op);
env = saved_env;
return ret;
} }
uint32_t helper_cc_compute_c(int op) uint32_t helper_cc_compute_c(CPUX86State *env, int op)
{ {
switch (op) { switch (op) {
default: /* should never happen */ default: /* should never happen */
return 0; return 0;
case CC_OP_EFLAGS: case CC_OP_EFLAGS:
return compute_c_eflags(); return compute_c_eflags(env);
case CC_OP_MULB: case CC_OP_MULB:
return compute_c_mull(); return compute_c_mull(env);
case CC_OP_MULW: case CC_OP_MULW:
return compute_c_mull(); return compute_c_mull(env);
case CC_OP_MULL: case CC_OP_MULL:
return compute_c_mull(); return compute_c_mull(env);
case CC_OP_ADDB: case CC_OP_ADDB:
return compute_c_addb(); return compute_c_addb(env);
case CC_OP_ADDW: case CC_OP_ADDW:
return compute_c_addw(); return compute_c_addw(env);
case CC_OP_ADDL: case CC_OP_ADDL:
return compute_c_addl(); return compute_c_addl(env);
case CC_OP_ADCB: case CC_OP_ADCB:
return compute_c_adcb(); return compute_c_adcb(env);
case CC_OP_ADCW: case CC_OP_ADCW:
return compute_c_adcw(); return compute_c_adcw(env);
case CC_OP_ADCL: case CC_OP_ADCL:
return compute_c_adcl(); return compute_c_adcl(env);
case CC_OP_SUBB: case CC_OP_SUBB:
return compute_c_subb(); return compute_c_subb(env);
case CC_OP_SUBW: case CC_OP_SUBW:
return compute_c_subw(); return compute_c_subw(env);
case CC_OP_SUBL: case CC_OP_SUBL:
return compute_c_subl(); return compute_c_subl(env);
case CC_OP_SBBB: case CC_OP_SBBB:
return compute_c_sbbb(); return compute_c_sbbb(env);
case CC_OP_SBBW: case CC_OP_SBBW:
return compute_c_sbbw(); return compute_c_sbbw(env);
case CC_OP_SBBL: case CC_OP_SBBL:
return compute_c_sbbl(); return compute_c_sbbl(env);
case CC_OP_LOGICB: case CC_OP_LOGICB:
return compute_c_logicb(); return compute_c_logicb();
@ -263,111 +255,112 @@ uint32_t helper_cc_compute_c(int op)
return compute_c_logicl(); return compute_c_logicl();
case CC_OP_INCB: case CC_OP_INCB:
return compute_c_incl(); return compute_c_incl(env);
case CC_OP_INCW: case CC_OP_INCW:
return compute_c_incl(); return compute_c_incl(env);
case CC_OP_INCL: case CC_OP_INCL:
return compute_c_incl(); return compute_c_incl(env);
case CC_OP_DECB: case CC_OP_DECB:
return compute_c_incl(); return compute_c_incl(env);
case CC_OP_DECW: case CC_OP_DECW:
return compute_c_incl(); return compute_c_incl(env);
case CC_OP_DECL: case CC_OP_DECL:
return compute_c_incl(); return compute_c_incl(env);
case CC_OP_SHLB: case CC_OP_SHLB:
return compute_c_shlb(); return compute_c_shlb(env);
case CC_OP_SHLW: case CC_OP_SHLW:
return compute_c_shlw(); return compute_c_shlw(env);
case CC_OP_SHLL: case CC_OP_SHLL:
return compute_c_shll(); return compute_c_shll(env);
case CC_OP_SARB: case CC_OP_SARB:
return compute_c_sarl(); return compute_c_sarl(env);
case CC_OP_SARW: case CC_OP_SARW:
return compute_c_sarl(); return compute_c_sarl(env);
case CC_OP_SARL: case CC_OP_SARL:
return compute_c_sarl(); return compute_c_sarl(env);
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
case CC_OP_MULQ: case CC_OP_MULQ:
return compute_c_mull(); return compute_c_mull(env);
case CC_OP_ADDQ: case CC_OP_ADDQ:
return compute_c_addq(); return compute_c_addq(env);
case CC_OP_ADCQ: case CC_OP_ADCQ:
return compute_c_adcq(); return compute_c_adcq(env);
case CC_OP_SUBQ: case CC_OP_SUBQ:
return compute_c_subq(); return compute_c_subq(env);
case CC_OP_SBBQ: case CC_OP_SBBQ:
return compute_c_sbbq(); return compute_c_sbbq(env);
case CC_OP_LOGICQ: case CC_OP_LOGICQ:
return compute_c_logicq(); return compute_c_logicq();
case CC_OP_INCQ: case CC_OP_INCQ:
return compute_c_incl(); return compute_c_incl(env);
case CC_OP_DECQ: case CC_OP_DECQ:
return compute_c_incl(); return compute_c_incl(env);
case CC_OP_SHLQ: case CC_OP_SHLQ:
return compute_c_shlq(); return compute_c_shlq(env);
case CC_OP_SARQ: case CC_OP_SARQ:
return compute_c_sarl(); return compute_c_sarl(env);
#endif #endif
} }
} }
void helper_write_eflags(target_ulong t0, uint32_t update_mask) void helper_write_eflags(CPUX86State *env, target_ulong t0,
uint32_t update_mask)
{ {
cpu_load_eflags(env, t0, update_mask); cpu_load_eflags(env, t0, update_mask);
} }
target_ulong helper_read_eflags(void) target_ulong helper_read_eflags(CPUX86State *env)
{ {
uint32_t eflags; uint32_t eflags;
eflags = helper_cc_compute_all(CC_OP); eflags = helper_cc_compute_all(env, CC_OP);
eflags |= (DF & DF_MASK); eflags |= (DF & DF_MASK);
eflags |= env->eflags & ~(VM_MASK | RF_MASK); eflags |= env->eflags & ~(VM_MASK | RF_MASK);
return eflags; return eflags;
} }
void helper_clts(void) void helper_clts(CPUX86State *env)
{ {
env->cr[0] &= ~CR0_TS_MASK; env->cr[0] &= ~CR0_TS_MASK;
env->hflags &= ~HF_TS_MASK; env->hflags &= ~HF_TS_MASK;
} }
void helper_reset_rf(void) void helper_reset_rf(CPUX86State *env)
{ {
env->eflags &= ~RF_MASK; env->eflags &= ~RF_MASK;
} }
void helper_cli(void) void helper_cli(CPUX86State *env)
{ {
env->eflags &= ~IF_MASK; env->eflags &= ~IF_MASK;
} }
void helper_sti(void) void helper_sti(CPUX86State *env)
{ {
env->eflags |= IF_MASK; env->eflags |= IF_MASK;
} }
#if 0 #if 0
/* vm86plus instructions */ /* vm86plus instructions */
void helper_cli_vm(void) void helper_cli_vm(CPUX86State *env)
{ {
env->eflags &= ~VIF_MASK; env->eflags &= ~VIF_MASK;
} }
void helper_sti_vm(void) void helper_sti_vm(CPUX86State *env)
{ {
env->eflags |= VIF_MASK; env->eflags |= VIF_MASK;
if (env->eflags & VIP_MASK) { if (env->eflags & VIP_MASK) {
@ -376,12 +369,12 @@ void helper_sti_vm(void)
} }
#endif #endif
void helper_set_inhibit_irq(void) void helper_set_inhibit_irq(CPUX86State *env)
{ {
env->hflags |= HF_INHIBIT_IRQ_MASK; env->hflags |= HF_INHIBIT_IRQ_MASK;
} }
void helper_reset_inhibit_irq(void) void helper_reset_inhibit_irq(CPUX86State *env)
{ {
env->hflags &= ~HF_INHIBIT_IRQ_MASK; env->hflags &= ~HF_INHIBIT_IRQ_MASK;
} }

36
target-i386/cc_helper_template.h
View File

@ -42,7 +42,7 @@
/* dynamic flags computation */ /* dynamic flags computation */
static int glue(compute_all_add, SUFFIX)(void) static int glue(compute_all_add, SUFFIX)(CPUX86State *env)
{ {
int cf, pf, af, zf, sf, of; int cf, pf, af, zf, sf, of;
target_long src1, src2; target_long src1, src2;
@ -58,7 +58,7 @@ static int glue(compute_all_add, SUFFIX)(void)
return cf | pf | af | zf | sf | of; return cf | pf | af | zf | sf | of;
} }
static int glue(compute_c_add, SUFFIX)(void) static int glue(compute_c_add, SUFFIX)(CPUX86State *env)
{ {
int cf; int cf;
target_long src1; target_long src1;
@ -68,7 +68,7 @@ static int glue(compute_c_add, SUFFIX)(void)
return cf; return cf;
} }
static int glue(compute_all_adc, SUFFIX)(void) static int glue(compute_all_adc, SUFFIX)(CPUX86State *env)
{ {
int cf, pf, af, zf, sf, of; int cf, pf, af, zf, sf, of;
target_long src1, src2; target_long src1, src2;
@ -84,7 +84,7 @@ static int glue(compute_all_adc, SUFFIX)(void)
return cf | pf | af | zf | sf | of; return cf | pf | af | zf | sf | of;
} }
static int glue(compute_c_adc, SUFFIX)(void) static int glue(compute_c_adc, SUFFIX)(CPUX86State *env)
{ {
int cf; int cf;
target_long src1; target_long src1;
@ -94,7 +94,7 @@ static int glue(compute_c_adc, SUFFIX)(void)
return cf; return cf;
} }
static int glue(compute_all_sub, SUFFIX)(void) static int glue(compute_all_sub, SUFFIX)(CPUX86State *env)
{ {
int cf, pf, af, zf, sf, of; int cf, pf, af, zf, sf, of;
target_long src1, src2; target_long src1, src2;
@ -110,7 +110,7 @@ static int glue(compute_all_sub, SUFFIX)(void)
return cf | pf | af | zf | sf | of; return cf | pf | af | zf | sf | of;
} }
static int glue(compute_c_sub, SUFFIX)(void) static int glue(compute_c_sub, SUFFIX)(CPUX86State *env)
{ {
int cf; int cf;
target_long src1, src2; target_long src1, src2;
@ -121,7 +121,7 @@ static int glue(compute_c_sub, SUFFIX)(void)
return cf; return cf;
} }
static int glue(compute_all_sbb, SUFFIX)(void) static int glue(compute_all_sbb, SUFFIX)(CPUX86State *env)
{ {
int cf, pf, af, zf, sf, of; int cf, pf, af, zf, sf, of;
target_long src1, src2; target_long src1, src2;
@ -137,7 +137,7 @@ static int glue(compute_all_sbb, SUFFIX)(void)
return cf | pf | af | zf | sf | of; return cf | pf | af | zf | sf | of;
} }
static int glue(compute_c_sbb, SUFFIX)(void) static int glue(compute_c_sbb, SUFFIX)(CPUX86State *env)
{ {
int cf; int cf;
target_long src1, src2; target_long src1, src2;
@ -148,7 +148,7 @@ static int glue(compute_c_sbb, SUFFIX)(void)
return cf; return cf;
} }
static int glue(compute_all_logic, SUFFIX)(void) static int glue(compute_all_logic, SUFFIX)(CPUX86State *env)
{ {
int cf, pf, af, zf, sf, of; int cf, pf, af, zf, sf, of;
@ -166,7 +166,7 @@ static int glue(compute_c_logic, SUFFIX)(void)
return 0; return 0;
} }
static int glue(compute_all_inc, SUFFIX)(void) static int glue(compute_all_inc, SUFFIX)(CPUX86State *env)
{ {
int cf, pf, af, zf, sf, of; int cf, pf, af, zf, sf, of;
target_long src1, src2; target_long src1, src2;
@ -183,13 +183,13 @@ static int glue(compute_all_inc, SUFFIX)(void)
} }
#if DATA_BITS == 32 #if DATA_BITS == 32
static int glue(compute_c_inc, SUFFIX)(void) static int glue(compute_c_inc, SUFFIX)(CPUX86State *env)
{ {
return CC_SRC; return CC_SRC;
} }
#endif #endif
static int glue(compute_all_dec, SUFFIX)(void) static int glue(compute_all_dec, SUFFIX)(CPUX86State *env)
{ {
int cf, pf, af, zf, sf, of; int cf, pf, af, zf, sf, of;
target_long src1, src2; target_long src1, src2;
@ -205,7 +205,7 @@ static int glue(compute_all_dec, SUFFIX)(void)
return cf | pf | af | zf | sf | of; return cf | pf | af | zf | sf | of;
} }
static int glue(compute_all_shl, SUFFIX)(void) static int glue(compute_all_shl, SUFFIX)(CPUX86State *env)
{ {
int cf, pf, af, zf, sf, of; int cf, pf, af, zf, sf, of;
@ -219,19 +219,19 @@ static int glue(compute_all_shl, SUFFIX)(void)
return cf | pf | af | zf | sf | of; return cf | pf | af | zf | sf | of;
} }
static int glue(compute_c_shl, SUFFIX)(void) static int glue(compute_c_shl, SUFFIX)(CPUX86State *env)
{ {
return (CC_SRC >> (DATA_BITS - 1)) & CC_C; return (CC_SRC >> (DATA_BITS - 1)) & CC_C;
} }
#if DATA_BITS == 32 #if DATA_BITS == 32
static int glue(compute_c_sar, SUFFIX)(void) static int glue(compute_c_sar, SUFFIX)(CPUX86State *env)
{ {
return CC_SRC & 1; return CC_SRC & 1;
} }
#endif #endif
static int glue(compute_all_sar, SUFFIX)(void) static int glue(compute_all_sar, SUFFIX)(CPUX86State *env)
{ {
int cf, pf, af, zf, sf, of; int cf, pf, af, zf, sf, of;
@ -246,7 +246,7 @@ static int glue(compute_all_sar, SUFFIX)(void)
} }
#if DATA_BITS == 32 #if DATA_BITS == 32
static int glue(compute_c_mul, SUFFIX)(void) static int glue(compute_c_mul, SUFFIX)(CPUX86State *env)
{ {
int cf; int cf;
@ -257,7 +257,7 @@ static int glue(compute_c_mul, SUFFIX)(void)
/* NOTE: we compute the flags like the P4. On olders CPUs, only OF and /* NOTE: we compute the flags like the P4. On olders CPUs, only OF and
CF are modified and it is slower to do that. */ CF are modified and it is slower to do that. */
static int glue(compute_all_mul, SUFFIX)(void) static int glue(compute_all_mul, SUFFIX)(CPUX86State *env)
{ {
int cf, pf, af, zf, sf, of; int cf, pf, af, zf, sf, of;

429
target-i386/fpu_helper.c
View File

File diff suppressed because it is too large Load Diff

352
target-i386/helper.h
View File

@ -1,93 +1,93 @@
#include "def-helper.h" #include "def-helper.h"
DEF_HELPER_FLAGS_1(cc_compute_all, TCG_CALL_PURE, i32, int) DEF_HELPER_FLAGS_2(cc_compute_all, TCG_CALL_PURE, i32, env, int)
DEF_HELPER_FLAGS_1(cc_compute_c, TCG_CALL_PURE, i32, int) DEF_HELPER_FLAGS_2(cc_compute_c, TCG_CALL_PURE, i32, env, int)
DEF_HELPER_0(lock, void) DEF_HELPER_0(lock, void)
DEF_HELPER_0(unlock, void) DEF_HELPER_0(unlock, void)
DEF_HELPER_2(write_eflags, void, tl, i32) DEF_HELPER_3(write_eflags, void, env, tl, i32)
DEF_HELPER_0(read_eflags, tl) DEF_HELPER_1(read_eflags, tl, env)
DEF_HELPER_1(divb_AL, void, tl) DEF_HELPER_2(divb_AL, void, env, tl)
DEF_HELPER_1(idivb_AL, void, tl) DEF_HELPER_2(idivb_AL, void, env, tl)
DEF_HELPER_1(divw_AX, void, tl) DEF_HELPER_2(divw_AX, void, env, tl)
DEF_HELPER_1(idivw_AX, void, tl) DEF_HELPER_2(idivw_AX, void, env, tl)
DEF_HELPER_1(divl_EAX, void, tl) DEF_HELPER_2(divl_EAX, void, env, tl)
DEF_HELPER_1(idivl_EAX, void, tl) DEF_HELPER_2(idivl_EAX, void, env, tl)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
DEF_HELPER_1(mulq_EAX_T0, void, tl) DEF_HELPER_2(mulq_EAX_T0, void, env, tl)
DEF_HELPER_1(imulq_EAX_T0, void, tl) DEF_HELPER_2(imulq_EAX_T0, void, env, tl)
DEF_HELPER_2(imulq_T0_T1, tl, tl, tl) DEF_HELPER_3(imulq_T0_T1, tl, env, tl, tl)
DEF_HELPER_1(divq_EAX, void, tl) DEF_HELPER_2(divq_EAX, void, env, tl)
DEF_HELPER_1(idivq_EAX, void, tl) DEF_HELPER_2(idivq_EAX, void, env, tl)
#endif #endif
DEF_HELPER_1(aam, void, int) DEF_HELPER_2(aam, void, env, int)
DEF_HELPER_1(aad, void, int) DEF_HELPER_2(aad, void, env, int)
DEF_HELPER_0(aaa, void) DEF_HELPER_1(aaa, void, env)
DEF_HELPER_0(aas, void) DEF_HELPER_1(aas, void, env)
DEF_HELPER_0(daa, void) DEF_HELPER_1(daa, void, env)
DEF_HELPER_0(das, void) DEF_HELPER_1(das, void, env)
DEF_HELPER_1(lsl, tl, tl) DEF_HELPER_2(lsl, tl, env, tl)
DEF_HELPER_1(lar, tl, tl) DEF_HELPER_2(lar, tl, env, tl)
DEF_HELPER_1(verr, void, tl) DEF_HELPER_2(verr, void, env, tl)
DEF_HELPER_1(verw, void, tl) DEF_HELPER_2(verw, void, env, tl)
DEF_HELPER_1(lldt, void, int) DEF_HELPER_2(lldt, void, env, int)
DEF_HELPER_1(ltr, void, int) DEF_HELPER_2(ltr, void, env, int)
DEF_HELPER_2(load_seg, void, int, int) DEF_HELPER_3(load_seg, void, env, int, int)
DEF_HELPER_3(ljmp_protected, void, int, tl, int) DEF_HELPER_4(ljmp_protected, void, env, int, tl, int)
DEF_HELPER_4(lcall_real, void, int, tl, int, int) DEF_HELPER_5(lcall_real, void, env, int, tl, int, int)
DEF_HELPER_4(lcall_protected, void, int, tl, int, int) DEF_HELPER_5(lcall_protected, void, env, int, tl, int, int)
DEF_HELPER_1(iret_real, void, int) DEF_HELPER_2(iret_real, void, env, int)
DEF_HELPER_2(iret_protected, void, int, int) DEF_HELPER_3(iret_protected, void, env, int, int)
DEF_HELPER_2(lret_protected, void, int, int) DEF_HELPER_3(lret_protected, void, env, int, int)
DEF_HELPER_1(read_crN, tl, int) DEF_HELPER_2(read_crN, tl, env, int)
DEF_HELPER_2(write_crN, void, int, tl) DEF_HELPER_3(write_crN, void, env, int, tl)
DEF_HELPER_1(lmsw, void, tl) DEF_HELPER_2(lmsw, void, env, tl)
DEF_HELPER_0(clts, void) DEF_HELPER_1(clts, void, env)
DEF_HELPER_2(movl_drN_T0, void, int, tl) DEF_HELPER_3(movl_drN_T0, void, env, int, tl)
DEF_HELPER_1(invlpg, void, tl) DEF_HELPER_2(invlpg, void, env, tl)
DEF_HELPER_3(enter_level, void, int, int, tl) DEF_HELPER_4(enter_level, void, env, int, int, tl)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
DEF_HELPER_3(enter64_level, void, int, int, tl) DEF_HELPER_4(enter64_level, void, env, int, int, tl)
#endif #endif
DEF_HELPER_0(sysenter, void) DEF_HELPER_1(sysenter, void, env)
DEF_HELPER_1(sysexit, void, int) DEF_HELPER_2(sysexit, void, env, int)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
DEF_HELPER_1(syscall, void, int) DEF_HELPER_2(syscall, void, env, int)
DEF_HELPER_1(sysret, void, int) DEF_HELPER_2(sysret, void, env, int)
#endif #endif
DEF_HELPER_1(hlt, void, int) DEF_HELPER_2(hlt, void, env, int)
DEF_HELPER_1(monitor, void, tl) DEF_HELPER_2(monitor, void, env, tl)
DEF_HELPER_1(mwait, void, int) DEF_HELPER_2(mwait, void, env, int)
DEF_HELPER_0(debug, void) DEF_HELPER_1(debug, void, env)
DEF_HELPER_0(reset_rf, void) DEF_HELPER_1(reset_rf, void, env)
DEF_HELPER_3(raise_interrupt, void, env, int, int) DEF_HELPER_3(raise_interrupt, void, env, int, int)
DEF_HELPER_2(raise_exception, void, env, int) DEF_HELPER_2(raise_exception, void, env, int)
DEF_HELPER_0(cli, void) DEF_HELPER_1(cli, void, env)
DEF_HELPER_0(sti, void) DEF_HELPER_1(sti, void, env)
DEF_HELPER_0(set_inhibit_irq, void) DEF_HELPER_1(set_inhibit_irq, void, env)
DEF_HELPER_0(reset_inhibit_irq, void) DEF_HELPER_1(reset_inhibit_irq, void, env)
DEF_HELPER_2(boundw, void, tl, int) DEF_HELPER_3(boundw, void, env, tl, int)
DEF_HELPER_2(boundl, void, tl, int) DEF_HELPER_3(boundl, void, env, tl, int)
DEF_HELPER_0(rsm, void) DEF_HELPER_1(rsm, void, env)
DEF_HELPER_1(into, void, int) DEF_HELPER_2(into, void, env, int)
DEF_HELPER_1(cmpxchg8b, void, tl) DEF_HELPER_2(cmpxchg8b, void, env, tl)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
DEF_HELPER_1(cmpxchg16b, void, tl) DEF_HELPER_2(cmpxchg16b, void, env, tl)
#endif #endif
DEF_HELPER_0(single_step, void) DEF_HELPER_1(single_step, void, env)
DEF_HELPER_0(cpuid, void) DEF_HELPER_1(cpuid, void, env)
DEF_HELPER_0(rdtsc, void) DEF_HELPER_1(rdtsc, void, env)
DEF_HELPER_0(rdtscp, void) DEF_HELPER_1(rdtscp, void, env)
DEF_HELPER_0(rdpmc, void) DEF_HELPER_1(rdpmc, void, env)
DEF_HELPER_0(rdmsr, void) DEF_HELPER_1(rdmsr, void, env)
DEF_HELPER_0(wrmsr, void) DEF_HELPER_1(wrmsr, void, env)
DEF_HELPER_1(check_iob, void, i32) DEF_HELPER_2(check_iob, void, env, i32)
DEF_HELPER_1(check_iow, void, i32) DEF_HELPER_2(check_iow, void, env, i32)
DEF_HELPER_1(check_iol, void, i32) DEF_HELPER_2(check_iol, void, env, i32)
DEF_HELPER_2(outb, void, i32, i32) DEF_HELPER_2(outb, void, i32, i32)
DEF_HELPER_1(inb, tl, i32) DEF_HELPER_1(inb, tl, i32)
DEF_HELPER_2(outw, void, i32, i32) DEF_HELPER_2(outw, void, i32, i32)
@ -95,127 +95,127 @@ DEF_HELPER_1(inw, tl, i32)
DEF_HELPER_2(outl, void, i32, i32) DEF_HELPER_2(outl, void, i32, i32)
DEF_HELPER_1(inl, tl, i32) DEF_HELPER_1(inl, tl, i32)
DEF_HELPER_2(svm_check_intercept_param, void, i32, i64) DEF_HELPER_3(svm_check_intercept_param, void, env, i32, i64)
DEF_HELPER_2(vmexit, void, i32, i64) DEF_HELPER_3(vmexit, void, env, i32, i64)
DEF_HELPER_3(svm_check_io, void, i32, i32, i32) DEF_HELPER_4(svm_check_io, void, env, i32, i32, i32)
DEF_HELPER_2(vmrun, void, int, int) DEF_HELPER_3(vmrun, void, env, int, int)
DEF_HELPER_0(vmmcall, void) DEF_HELPER_1(vmmcall, void, env)
DEF_HELPER_1(vmload, void, int) DEF_HELPER_2(vmload, void, env, int)
DEF_HELPER_1(vmsave, void, int) DEF_HELPER_2(vmsave, void, env, int)
DEF_HELPER_0(stgi, void) DEF_HELPER_1(stgi, void, env)
DEF_HELPER_0(clgi, void) DEF_HELPER_1(clgi, void, env)
DEF_HELPER_0(skinit, void) DEF_HELPER_1(skinit, void, env)
DEF_HELPER_1(invlpga, void, int) DEF_HELPER_2(invlpga, void, env, int)
/* x86 FPU */ /* x86 FPU */
DEF_HELPER_1(flds_FT0, void, i32) DEF_HELPER_2(flds_FT0, void, env, i32)
DEF_HELPER_1(fldl_FT0, void, i64) DEF_HELPER_2(fldl_FT0, void, env, i64)
DEF_HELPER_1(fildl_FT0, void, s32) DEF_HELPER_2(fildl_FT0, void, env, s32)
DEF_HELPER_1(flds_ST0, void, i32) DEF_HELPER_2(flds_ST0, void, env, i32)
DEF_HELPER_1(fldl_ST0, void, i64) DEF_HELPER_2(fldl_ST0, void, env, i64)
DEF_HELPER_1(fildl_ST0, void, s32) DEF_HELPER_2(fildl_ST0, void, env, s32)
DEF_HELPER_1(fildll_ST0, void, s64) DEF_HELPER_2(fildll_ST0, void, env, s64)
DEF_HELPER_0(fsts_ST0, i32) DEF_HELPER_1(fsts_ST0, i32, env)
DEF_HELPER_0(fstl_ST0, i64) DEF_HELPER_1(fstl_ST0, i64, env)
DEF_HELPER_0(fist_ST0, s32) DEF_HELPER_1(fist_ST0, s32, env)
DEF_HELPER_0(fistl_ST0, s32) DEF_HELPER_1(fistl_ST0, s32, env)
DEF_HELPER_0(fistll_ST0, s64) DEF_HELPER_1(fistll_ST0, s64, env)
DEF_HELPER_0(fistt_ST0, s32) DEF_HELPER_1(fistt_ST0, s32, env)
DEF_HELPER_0(fisttl_ST0, s32) DEF_HELPER_1(fisttl_ST0, s32, env)
DEF_HELPER_0(fisttll_ST0, s64) DEF_HELPER_1(fisttll_ST0, s64, env)
DEF_HELPER_1(fldt_ST0, void, tl) DEF_HELPER_2(fldt_ST0, void, env, tl)
DEF_HELPER_1(fstt_ST0, void, tl) DEF_HELPER_2(fstt_ST0, void, env, tl)
DEF_HELPER_0(fpush, void) DEF_HELPER_1(fpush, void, env)
DEF_HELPER_0(fpop, void) DEF_HELPER_1(fpop, void, env)
DEF_HELPER_0(fdecstp, void) DEF_HELPER_1(fdecstp, void, env)
DEF_HELPER_0(fincstp, void) DEF_HELPER_1(fincstp, void, env)
DEF_HELPER_1(ffree_STN, void, int) DEF_HELPER_2(ffree_STN, void, env, int)
DEF_HELPER_0(fmov_ST0_FT0, void) DEF_HELPER_1(fmov_ST0_FT0, void, env)
DEF_HELPER_1(fmov_FT0_STN, void, int) DEF_HELPER_2(fmov_FT0_STN, void, env, int)
DEF_HELPER_1(fmov_ST0_STN, void, int) DEF_HELPER_2(fmov_ST0_STN, void, env, int)
DEF_HELPER_1(fmov_STN_ST0, void, int) DEF_HELPER_2(fmov_STN_ST0, void, env, int)
DEF_HELPER_1(fxchg_ST0_STN, void, int) DEF_HELPER_2(fxchg_ST0_STN, void, env, int)
DEF_HELPER_0(fcom_ST0_FT0, void) DEF_HELPER_1(fcom_ST0_FT0, void, env)
DEF_HELPER_0(fucom_ST0_FT0, void) DEF_HELPER_1(fucom_ST0_FT0, void, env)
DEF_HELPER_0(fcomi_ST0_FT0, void) DEF_HELPER_1(fcomi_ST0_FT0, void, env)
DEF_HELPER_0(fucomi_ST0_FT0, void) DEF_HELPER_1(fucomi_ST0_FT0, void, env)
DEF_HELPER_0(fadd_ST0_FT0, void) DEF_HELPER_1(fadd_ST0_FT0, void, env)
DEF_HELPER_0(fmul_ST0_FT0, void) DEF_HELPER_1(fmul_ST0_FT0, void, env)
DEF_HELPER_0(fsub_ST0_FT0, void) DEF_HELPER_1(fsub_ST0_FT0, void, env)
DEF_HELPER_0(fsubr_ST0_FT0, void) DEF_HELPER_1(fsubr_ST0_FT0, void, env)
DEF_HELPER_0(fdiv_ST0_FT0, void) DEF_HELPER_1(fdiv_ST0_FT0, void, env)
DEF_HELPER_0(fdivr_ST0_FT0, void) DEF_HELPER_1(fdivr_ST0_FT0, void, env)
DEF_HELPER_1(fadd_STN_ST0, void, int) DEF_HELPER_2(fadd_STN_ST0, void, env, int)
DEF_HELPER_1(fmul_STN_ST0, void, int) DEF_HELPER_2(fmul_STN_ST0, void, env, int)
DEF_HELPER_1(fsub_STN_ST0, void, int) DEF_HELPER_2(fsub_STN_ST0, void, env, int)
DEF_HELPER_1(fsubr_STN_ST0, void, int) DEF_HELPER_2(fsubr_STN_ST0, void, env, int)
DEF_HELPER_1(fdiv_STN_ST0, void, int) DEF_HELPER_2(fdiv_STN_ST0, void, env, int)
DEF_HELPER_1(fdivr_STN_ST0, void, int) DEF_HELPER_2(fdivr_STN_ST0, void, env, int)
DEF_HELPER_0(fchs_ST0, void) DEF_HELPER_1(fchs_ST0, void, env)
DEF_HELPER_0(fabs_ST0, void) DEF_HELPER_1(fabs_ST0, void, env)
DEF_HELPER_0(fxam_ST0, void) DEF_HELPER_1(fxam_ST0, void, env)
DEF_HELPER_0(fld1_ST0, void) DEF_HELPER_1(fld1_ST0, void, env)
DEF_HELPER_0(fldl2t_ST0, void) DEF_HELPER_1(fldl2t_ST0, void, env)
DEF_HELPER_0(fldl2e_ST0, void) DEF_HELPER_1(fldl2e_ST0, void, env)
DEF_HELPER_0(fldpi_ST0, void) DEF_HELPER_1(fldpi_ST0, void, env)
DEF_HELPER_0(fldlg2_ST0, void) DEF_HELPER_1(fldlg2_ST0, void, env)
DEF_HELPER_0(fldln2_ST0, void) DEF_HELPER_1(fldln2_ST0, void, env)
DEF_HELPER_0(fldz_ST0, void) DEF_HELPER_1(fldz_ST0, void, env)
DEF_HELPER_0(fldz_FT0, void) DEF_HELPER_1(fldz_FT0, void, env)
DEF_HELPER_0(fnstsw, i32) DEF_HELPER_1(fnstsw, i32, env)
DEF_HELPER_0(fnstcw, i32) DEF_HELPER_1(fnstcw, i32, env)
DEF_HELPER_1(fldcw, void, i32) DEF_HELPER_2(fldcw, void, env, i32)
DEF_HELPER_0(fclex, void) DEF_HELPER_1(fclex, void, env)
DEF_HELPER_0(fwait, void) DEF_HELPER_1(fwait, void, env)
DEF_HELPER_0(fninit, void) DEF_HELPER_1(fninit, void, env)
DEF_HELPER_1(fbld_ST0, void, tl) DEF_HELPER_2(fbld_ST0, void, env, tl)
DEF_HELPER_1(fbst_ST0, void, tl) DEF_HELPER_2(fbst_ST0, void, env, tl)
DEF_HELPER_0(f2xm1, void) DEF_HELPER_1(f2xm1, void, env)
DEF_HELPER_0(fyl2x, void) DEF_HELPER_1(fyl2x, void, env)
DEF_HELPER_0(fptan, void) DEF_HELPER_1(fptan, void, env)
DEF_HELPER_0(fpatan, void) DEF_HELPER_1(fpatan, void, env)
DEF_HELPER_0(fxtract, void) DEF_HELPER_1(fxtract, void, env)
DEF_HELPER_0(fprem1, void) DEF_HELPER_1(fprem1, void, env)
DEF_HELPER_0(fprem, void) DEF_HELPER_1(fprem, void, env)
DEF_HELPER_0(fyl2xp1, void) DEF_HELPER_1(fyl2xp1, void, env)
DEF_HELPER_0(fsqrt, void) DEF_HELPER_1(fsqrt, void, env)
DEF_HELPER_0(fsincos, void) DEF_HELPER_1(fsincos, void, env)
DEF_HELPER_0(frndint, void) DEF_HELPER_1(frndint, void, env)
DEF_HELPER_0(fscale, void) DEF_HELPER_1(fscale, void, env)
DEF_HELPER_0(fsin, void) DEF_HELPER_1(fsin, void, env)
DEF_HELPER_0(fcos, void) DEF_HELPER_1(fcos, void, env)
DEF_HELPER_2(fstenv, void, tl, int) DEF_HELPER_3(fstenv, void, env, tl, int)
DEF_HELPER_2(fldenv, void, tl, int) DEF_HELPER_3(fldenv, void, env, tl, int)
DEF_HELPER_2(fsave, void, tl, int) DEF_HELPER_3(fsave, void, env, tl, int)
DEF_HELPER_2(frstor, void, tl, int) DEF_HELPER_3(frstor, void, env, tl, int)
DEF_HELPER_2(fxsave, void, tl, int) DEF_HELPER_3(fxsave, void, env, tl, int)
DEF_HELPER_2(fxrstor, void, tl, int) DEF_HELPER_3(fxrstor, void, env, tl, int)
DEF_HELPER_1(bsf, tl, tl) DEF_HELPER_1(bsf, tl, tl)
DEF_HELPER_1(bsr, tl, tl) DEF_HELPER_1(bsr, tl, tl)
DEF_HELPER_2(lzcnt, tl, tl, int) DEF_HELPER_2(lzcnt, tl, tl, int)
/* MMX/SSE */ /* MMX/SSE */
DEF_HELPER_1(ldmxcsr, void, i32) DEF_HELPER_2(ldmxcsr, void, env, i32)
DEF_HELPER_0(enter_mmx, void) DEF_HELPER_1(enter_mmx, void, env)
DEF_HELPER_0(emms, void) DEF_HELPER_1(emms, void, env)
DEF_HELPER_2(movq, void, ptr, ptr) DEF_HELPER_3(movq, void, env, ptr, ptr)
#define SHIFT 0 #define SHIFT 0
#include "ops_sse_header.h" #include "ops_sse_header.h"
#define SHIFT 1 #define SHIFT 1
#include "ops_sse_header.h" #include "ops_sse_header.h"
DEF_HELPER_2(rclb, tl, tl, tl) DEF_HELPER_3(rclb, tl, env, tl, tl)
DEF_HELPER_2(rclw, tl, tl, tl) DEF_HELPER_3(rclw, tl, env, tl, tl)
DEF_HELPER_2(rcll, tl, tl, tl) DEF_HELPER_3(rcll, tl, env, tl, tl)
DEF_HELPER_2(rcrb, tl, tl, tl) DEF_HELPER_3(rcrb, tl, env, tl, tl)
DEF_HELPER_2(rcrw, tl, tl, tl) DEF_HELPER_3(rcrw, tl, env, tl, tl)
DEF_HELPER_2(rcrl, tl, tl, tl) DEF_HELPER_3(rcrl, tl, env, tl, tl)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
DEF_HELPER_2(rclq, tl, tl, tl) DEF_HELPER_3(rclq, tl, env, tl, tl)
DEF_HELPER_2(rcrq, tl, tl, tl) DEF_HELPER_3(rcrq, tl, env, tl, tl)
#endif #endif
#include "def-helper.h" #include "def-helper.h"

44
target-i386/int_helper.c
View File

@ -18,7 +18,6 @@
*/ */
#include "cpu.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "host-utils.h" #include "host-utils.h"
#include "helper.h" #include "helper.h"
@ -42,7 +41,7 @@ static const uint8_t rclw_table[32] = {
/* division, flags are undefined */ /* division, flags are undefined */
void helper_divb_AL(target_ulong t0) void helper_divb_AL(CPUX86State *env, target_ulong t0)
{ {
unsigned int num, den, q, r; unsigned int num, den, q, r;
@ -60,7 +59,7 @@ void helper_divb_AL(target_ulong t0)
EAX = (EAX & ~0xffff) | (r << 8) | q; EAX = (EAX & ~0xffff) | (r << 8) | q;
} }
void helper_idivb_AL(target_ulong t0) void helper_idivb_AL(CPUX86State *env, target_ulong t0)
{ {
int num, den, q, r; int num, den, q, r;
@ -78,7 +77,7 @@ void helper_idivb_AL(target_ulong t0)
EAX = (EAX & ~0xffff) | (r << 8) | q; EAX = (EAX & ~0xffff) | (r << 8) | q;
} }
void helper_divw_AX(target_ulong t0) void helper_divw_AX(CPUX86State *env, target_ulong t0)
{ {
unsigned int num, den, q, r; unsigned int num, den, q, r;
@ -97,7 +96,7 @@ void helper_divw_AX(target_ulong t0)
EDX = (EDX & ~0xffff) | r; EDX = (EDX & ~0xffff) | r;
} }
void helper_idivw_AX(target_ulong t0) void helper_idivw_AX(CPUX86State *env, target_ulong t0)
{ {
int num, den, q, r; int num, den, q, r;
@ -116,7 +115,7 @@ void helper_idivw_AX(target_ulong t0)
EDX = (EDX & ~0xffff) | r; EDX = (EDX & ~0xffff) | r;
} }
void helper_divl_EAX(target_ulong t0) void helper_divl_EAX(CPUX86State *env, target_ulong t0)
{ {
unsigned int den, r; unsigned int den, r;
uint64_t num, q; uint64_t num, q;
@ -135,7 +134,7 @@ void helper_divl_EAX(target_ulong t0)
EDX = (uint32_t)r; EDX = (uint32_t)r;
} }
void helper_idivl_EAX(target_ulong t0) void helper_idivl_EAX(CPUX86State *env, target_ulong t0)
{ {
int den, r; int den, r;
int64_t num, q; int64_t num, q;
@ -157,7 +156,7 @@ void helper_idivl_EAX(target_ulong t0)
/* bcd */ /* bcd */
/* XXX: exception */ /* XXX: exception */
void helper_aam(int base) void helper_aam(CPUX86State *env, int base)
{ {
int al, ah; int al, ah;
@ -168,7 +167,7 @@ void helper_aam(int base)
CC_DST = al; CC_DST = al;
} }
void helper_aad(int base) void helper_aad(CPUX86State *env, int base)
{ {
int al, ah; int al, ah;
@ -179,13 +178,13 @@ void helper_aad(int base)
CC_DST = al; CC_DST = al;
} }
void helper_aaa(void) void helper_aaa(CPUX86State *env)
{ {
int icarry; int icarry;
int al, ah, af; int al, ah, af;
int eflags; int eflags;
eflags = helper_cc_compute_all(CC_OP); eflags = cpu_cc_compute_all(env, CC_OP);
af = eflags & CC_A; af = eflags & CC_A;
al = EAX & 0xff; al = EAX & 0xff;
ah = (EAX >> 8) & 0xff; ah = (EAX >> 8) & 0xff;
@ -203,13 +202,13 @@ void helper_aaa(void)
CC_SRC = eflags; CC_SRC = eflags;
} }
void helper_aas(void) void helper_aas(CPUX86State *env)
{ {
int icarry; int icarry;
int al, ah, af; int al, ah, af;
int eflags; int eflags;
eflags = helper_cc_compute_all(CC_OP); eflags = cpu_cc_compute_all(env, CC_OP);
af = eflags & CC_A; af = eflags & CC_A;
al = EAX & 0xff; al = EAX & 0xff;
ah = (EAX >> 8) & 0xff; ah = (EAX >> 8) & 0xff;
@ -227,12 +226,12 @@ void helper_aas(void)
CC_SRC = eflags; CC_SRC = eflags;
} }
void helper_daa(void) void helper_daa(CPUX86State *env)
{ {
int old_al, al, af, cf; int old_al, al, af, cf;
int eflags; int eflags;
eflags = helper_cc_compute_all(CC_OP); eflags = cpu_cc_compute_all(env, CC_OP);
cf = eflags & CC_C; cf = eflags & CC_C;
af = eflags & CC_A; af = eflags & CC_A;
old_al = al = EAX & 0xff; old_al = al = EAX & 0xff;
@ -254,12 +253,12 @@ void helper_daa(void)
CC_SRC = eflags; CC_SRC = eflags;
} }
void helper_das(void) void helper_das(CPUX86State *env)
{ {
int al, al1, af, cf; int al, al1, af, cf;
int eflags; int eflags;
eflags = helper_cc_compute_all(CC_OP); eflags = cpu_cc_compute_all(env, CC_OP);
cf = eflags & CC_C; cf = eflags & CC_C;
af = eflags & CC_A; af = eflags & CC_A;
al = EAX & 0xff; al = EAX & 0xff;
@ -375,7 +374,7 @@ static int idiv64(uint64_t *plow, uint64_t *phigh, int64_t b)
return 0; return 0;
} }
void helper_mulq_EAX_T0(target_ulong t0) void helper_mulq_EAX_T0(CPUX86State *env, target_ulong t0)
{ {
uint64_t r0, r1; uint64_t r0, r1;
@ -386,7 +385,7 @@ void helper_mulq_EAX_T0(target_ulong t0)
CC_SRC = r1; CC_SRC = r1;
} }
void helper_imulq_EAX_T0(target_ulong t0) void helper_imulq_EAX_T0(CPUX86State *env, target_ulong t0)
{ {
uint64_t r0, r1; uint64_t r0, r1;
@ -397,7 +396,8 @@ void helper_imulq_EAX_T0(target_ulong t0)
CC_SRC = ((int64_t)r1 != ((int64_t)r0 >> 63)); CC_SRC = ((int64_t)r1 != ((int64_t)r0 >> 63));
} }
target_ulong helper_imulq_T0_T1(target_ulong t0, target_ulong t1) target_ulong helper_imulq_T0_T1(CPUX86State *env, target_ulong t0,
target_ulong t1)
{ {
uint64_t r0, r1; uint64_t r0, r1;
@ -407,7 +407,7 @@ target_ulong helper_imulq_T0_T1(target_ulong t0, target_ulong t1)
return r0; return r0;
} }
void helper_divq_EAX(target_ulong t0) void helper_divq_EAX(CPUX86State *env, target_ulong t0)
{ {
uint64_t r0, r1; uint64_t r0, r1;
@ -423,7 +423,7 @@ void helper_divq_EAX(target_ulong t0)
EDX = r1; EDX = r1;
} }
void helper_idivq_EAX(target_ulong t0) void helper_idivq_EAX(CPUX86State *env, target_ulong t0)
{ {
uint64_t r0, r1; uint64_t r0, r1;

46
target-i386/mem_helper.c
View File

@ -18,7 +18,6 @@
*/ */
#include "cpu.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h" #include "helper.h"
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
@ -39,19 +38,19 @@ void helper_unlock(void)
spin_unlock(&global_cpu_lock); spin_unlock(&global_cpu_lock);
} }
void helper_cmpxchg8b(target_ulong a0) void helper_cmpxchg8b(CPUX86State *env, target_ulong a0)
{ {
uint64_t d; uint64_t d;
int eflags; int eflags;
eflags = helper_cc_compute_all(CC_OP); eflags = cpu_cc_compute_all(env, CC_OP);
d = ldq(a0); d = cpu_ldq_data(env, a0);
if (d == (((uint64_t)EDX << 32) | (uint32_t)EAX)) { if (d == (((uint64_t)EDX << 32) | (uint32_t)EAX)) {
stq(a0, ((uint64_t)ECX << 32) | (uint32_t)EBX); cpu_stq_data(env, a0, ((uint64_t)ECX << 32) | (uint32_t)EBX);
eflags |= CC_Z; eflags |= CC_Z;
} else { } else {
/* always do the store */ /* always do the store */
stq(a0, d); cpu_stq_data(env, a0, d);
EDX = (uint32_t)(d >> 32); EDX = (uint32_t)(d >> 32);
EAX = (uint32_t)d; EAX = (uint32_t)d;
eflags &= ~CC_Z; eflags &= ~CC_Z;
@ -60,7 +59,7 @@ void helper_cmpxchg8b(target_ulong a0)
} }
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
void helper_cmpxchg16b(target_ulong a0) void helper_cmpxchg16b(CPUX86State *env, target_ulong a0)
{ {
uint64_t d0, d1; uint64_t d0, d1;
int eflags; int eflags;
@ -68,17 +67,17 @@ void helper_cmpxchg16b(target_ulong a0)
if ((a0 & 0xf) != 0) { if ((a0 & 0xf) != 0) {
raise_exception(env, EXCP0D_GPF); raise_exception(env, EXCP0D_GPF);
} }
eflags = helper_cc_compute_all(CC_OP); eflags = cpu_cc_compute_all(env, CC_OP);
d0 = ldq(a0); d0 = cpu_ldq_data(env, a0);
d1 = ldq(a0 + 8); d1 = cpu_ldq_data(env, a0 + 8);
if (d0 == EAX && d1 == EDX) { if (d0 == EAX && d1 == EDX) {
stq(a0, EBX); cpu_stq_data(env, a0, EBX);
stq(a0 + 8, ECX); cpu_stq_data(env, a0 + 8, ECX);
eflags |= CC_Z; eflags |= CC_Z;
} else { } else {
/* always do the store */ /* always do the store */
stq(a0, d0); cpu_stq_data(env, a0, d0);
stq(a0 + 8, d1); cpu_stq_data(env, a0 + 8, d1);
EDX = d1; EDX = d1;
EAX = d0; EAX = d0;
eflags &= ~CC_Z; eflags &= ~CC_Z;
@ -87,24 +86,24 @@ void helper_cmpxchg16b(target_ulong a0)
} }
#endif #endif
void helper_boundw(target_ulong a0, int v) void helper_boundw(CPUX86State *env, target_ulong a0, int v)
{ {
int low, high; int low, high;
low = ldsw(a0); low = cpu_ldsw_data(env, a0);
high = ldsw(a0 + 2); high = cpu_ldsw_data(env, a0 + 2);
v = (int16_t)v; v = (int16_t)v;
if (v < low || v > high) { if (v < low || v > high) {
raise_exception(env, EXCP05_BOUND); raise_exception(env, EXCP05_BOUND);
} }
} }
void helper_boundl(target_ulong a0, int v) void helper_boundl(CPUX86State *env, target_ulong a0, int v)
{ {
int low, high; int low, high;
low = ldl(a0); low = cpu_ldl_data(env, a0);
high = ldl(a0 + 4); high = cpu_ldl_data(env, a0 + 4);
if (v < low || v > high) { if (v < low || v > high) {
raise_exception(env, EXCP05_BOUND); raise_exception(env, EXCP05_BOUND);
} }
@ -133,15 +132,11 @@ void helper_boundl(target_ulong a0, int v)
NULL, it means that the function was called in C code (i.e. not NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */ from generated code or from helper.c) */
/* XXX: fix it to restore all registers */ /* XXX: fix it to restore all registers */
void tlb_fill(CPUX86State *env1, target_ulong addr, int is_write, int mmu_idx, void tlb_fill(CPUX86State *env, target_ulong addr, int is_write, int mmu_idx,
uintptr_t retaddr) uintptr_t retaddr)
{ {
TranslationBlock *tb; TranslationBlock *tb;
int ret; int ret;
CPUX86State *saved_env;
saved_env = env;
env = env1;
ret = cpu_x86_handle_mmu_fault(env, addr, is_write, mmu_idx); ret = cpu_x86_handle_mmu_fault(env, addr, is_write, mmu_idx);
if (ret) { if (ret) {
@ -156,6 +151,5 @@ void tlb_fill(CPUX86State *env1, target_ulong addr, int is_write, int mmu_idx,
} }
raise_exception_err(env, env->exception_index, env->error_code); raise_exception_err(env, env->exception_index, env->error_code);
} }
env = saved_env;
} }
#endif #endif

75
target-i386/misc_helper.c
View File

@ -18,7 +18,6 @@
*/ */
#include "cpu.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "ioport.h" #include "ioport.h"
#include "helper.h" #include "helper.h"
@ -27,7 +26,7 @@
#endif /* !defined(CONFIG_USER_ONLY) */ #endif /* !defined(CONFIG_USER_ONLY) */
/* check if Port I/O is allowed in TSS */ /* check if Port I/O is allowed in TSS */
static inline void check_io(int addr, int size) static inline void check_io(CPUX86State *env, int addr, int size)
{ {
int io_offset, val, mask; int io_offset, val, mask;
@ -37,13 +36,13 @@ static inline void check_io(int addr, int size)
env->tr.limit < 103) { env->tr.limit < 103) {
goto fail; goto fail;
} }
io_offset = lduw_kernel(env->tr.base + 0x66); io_offset = cpu_lduw_kernel(env, env->tr.base + 0x66);
io_offset += (addr >> 3); io_offset += (addr >> 3);
/* Note: the check needs two bytes */ /* Note: the check needs two bytes */
if ((io_offset + 1) > env->tr.limit) { if ((io_offset + 1) > env->tr.limit) {
goto fail; goto fail;
} }
val = lduw_kernel(env->tr.base + io_offset); val = cpu_lduw_kernel(env, env->tr.base + io_offset);
val >>= (addr & 7); val >>= (addr & 7);
mask = (1 << size) - 1; mask = (1 << size) - 1;
/* all bits must be zero to allow the I/O */ /* all bits must be zero to allow the I/O */
@ -53,19 +52,19 @@ static inline void check_io(int addr, int size)
} }
} }
void helper_check_iob(uint32_t t0) void helper_check_iob(CPUX86State *env, uint32_t t0)
{ {
check_io(t0, 1); check_io(env, t0, 1);
} }
void helper_check_iow(uint32_t t0) void helper_check_iow(CPUX86State *env, uint32_t t0)
{ {
check_io(t0, 2); check_io(env, t0, 2);
} }
void helper_check_iol(uint32_t t0) void helper_check_iol(CPUX86State *env, uint32_t t0)
{ {
check_io(t0, 4); check_io(env, t0, 4);
} }
void helper_outb(uint32_t port, uint32_t data) void helper_outb(uint32_t port, uint32_t data)
@ -98,17 +97,17 @@ target_ulong helper_inl(uint32_t port)
return cpu_inl(port); return cpu_inl(port);
} }
void helper_into(int next_eip_addend) void helper_into(CPUX86State *env, int next_eip_addend)
{ {
int eflags; int eflags;
eflags = helper_cc_compute_all(CC_OP); eflags = cpu_cc_compute_all(env, CC_OP);
if (eflags & CC_O) { if (eflags & CC_O) {
raise_interrupt(env, EXCP04_INTO, 1, 0, next_eip_addend); raise_interrupt(env, EXCP04_INTO, 1, 0, next_eip_addend);
} }
} }
void helper_single_step(void) void helper_single_step(CPUX86State *env)
{ {
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
check_hw_breakpoints(env, 1); check_hw_breakpoints(env, 1);
@ -117,7 +116,7 @@ void helper_single_step(void)
raise_exception(env, EXCP01_DB); raise_exception(env, EXCP01_DB);
} }
void helper_cpuid(void) void helper_cpuid(CPUX86State *env)
{ {
uint32_t eax, ebx, ecx, edx; uint32_t eax, ebx, ecx, edx;
@ -131,20 +130,20 @@ void helper_cpuid(void)
} }
#if defined(CONFIG_USER_ONLY) #if defined(CONFIG_USER_ONLY)
target_ulong helper_read_crN(int reg) target_ulong helper_read_crN(CPUX86State *env, int reg)
{ {
return 0; return 0;
} }
void helper_write_crN(int reg, target_ulong t0) void helper_write_crN(CPUX86State *env, int reg, target_ulong t0)
{ {
} }
void helper_movl_drN_T0(int reg, target_ulong t0) void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0)
{ {
} }
#else #else
target_ulong helper_read_crN(int reg) target_ulong helper_read_crN(CPUX86State *env, int reg)
{ {
target_ulong val; target_ulong val;
@ -164,7 +163,7 @@ target_ulong helper_read_crN(int reg)
return val; return val;
} }
void helper_write_crN(int reg, target_ulong t0) void helper_write_crN(CPUX86State *env, int reg, target_ulong t0)
{ {
cpu_svm_check_intercept_param(env, SVM_EXIT_WRITE_CR0 + reg, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_WRITE_CR0 + reg, 0);
switch (reg) { switch (reg) {
@ -189,7 +188,7 @@ void helper_write_crN(int reg, target_ulong t0)
} }
} }
void helper_movl_drN_T0(int reg, target_ulong t0) void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0)
{ {
int i; int i;
@ -211,21 +210,21 @@ void helper_movl_drN_T0(int reg, target_ulong t0)
} }
#endif #endif
void helper_lmsw(target_ulong t0) void helper_lmsw(CPUX86State *env, target_ulong t0)
{ {
/* only 4 lower bits of CR0 are modified. PE cannot be set to zero /* only 4 lower bits of CR0 are modified. PE cannot be set to zero
if already set to one. */ if already set to one. */
t0 = (env->cr[0] & ~0xe) | (t0 & 0xf); t0 = (env->cr[0] & ~0xe) | (t0 & 0xf);
helper_write_crN(0, t0); helper_write_crN(env, 0, t0);
} }
void helper_invlpg(target_ulong addr) void helper_invlpg(CPUX86State *env, target_ulong addr)
{ {
cpu_svm_check_intercept_param(env, SVM_EXIT_INVLPG, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_INVLPG, 0);
tlb_flush_page(env, addr); tlb_flush_page(env, addr);
} }
void helper_rdtsc(void) void helper_rdtsc(CPUX86State *env)
{ {
uint64_t val; uint64_t val;
@ -239,13 +238,13 @@ void helper_rdtsc(void)
EDX = (uint32_t)(val >> 32); EDX = (uint32_t)(val >> 32);
} }
void helper_rdtscp(void) void helper_rdtscp(CPUX86State *env)
{ {
helper_rdtsc(); helper_rdtsc(env);
ECX = (uint32_t)(env->tsc_aux); ECX = (uint32_t)(env->tsc_aux);
} }
void helper_rdpmc(void) void helper_rdpmc(CPUX86State *env)
{ {
if ((env->cr[4] & CR4_PCE_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) { if ((env->cr[4] & CR4_PCE_MASK) && ((env->hflags & HF_CPL_MASK) != 0)) {
raise_exception(env, EXCP0D_GPF); raise_exception(env, EXCP0D_GPF);
@ -258,15 +257,15 @@ void helper_rdpmc(void)
} }
#if defined(CONFIG_USER_ONLY) #if defined(CONFIG_USER_ONLY)
void helper_wrmsr(void) void helper_wrmsr(CPUX86State *env)
{ {
} }
void helper_rdmsr(void) void helper_rdmsr(CPUX86State *env)
{ {
} }
#else #else
void helper_wrmsr(void) void helper_wrmsr(CPUX86State *env)
{ {
uint64_t val; uint64_t val;
@ -413,7 +412,7 @@ void helper_wrmsr(void)
} }
} }
void helper_rdmsr(void) void helper_rdmsr(CPUX86State *env)
{ {
uint64_t val; uint64_t val;
@ -554,7 +553,7 @@ void helper_rdmsr(void)
} }
#endif #endif
static void do_hlt(void) static void do_hlt(CPUX86State *env)
{ {
env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */ env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
env->halted = 1; env->halted = 1;
@ -562,15 +561,15 @@ static void do_hlt(void)
cpu_loop_exit(env); cpu_loop_exit(env);
} }
void helper_hlt(int next_eip_addend) void helper_hlt(CPUX86State *env, int next_eip_addend)
{ {
cpu_svm_check_intercept_param(env, SVM_EXIT_HLT, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_HLT, 0);
EIP += next_eip_addend; EIP += next_eip_addend;
do_hlt(); do_hlt(env);
} }
void helper_monitor(target_ulong ptr) void helper_monitor(CPUX86State *env, target_ulong ptr)
{ {
if ((uint32_t)ECX != 0) { if ((uint32_t)ECX != 0) {
raise_exception(env, EXCP0D_GPF); raise_exception(env, EXCP0D_GPF);
@ -579,7 +578,7 @@ void helper_monitor(target_ulong ptr)
cpu_svm_check_intercept_param(env, SVM_EXIT_MONITOR, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_MONITOR, 0);
} }
void helper_mwait(int next_eip_addend) void helper_mwait(CPUX86State *env, int next_eip_addend)
{ {
if ((uint32_t)ECX != 0) { if ((uint32_t)ECX != 0) {
raise_exception(env, EXCP0D_GPF); raise_exception(env, EXCP0D_GPF);
@ -592,11 +591,11 @@ void helper_mwait(int next_eip_addend)
/* more than one CPU: do not sleep because another CPU may /* more than one CPU: do not sleep because another CPU may
wake this one */ wake this one */
} else { } else {
do_hlt(); do_hlt(env);
} }
} }
void helper_debug(void) void helper_debug(CPUX86State *env)
{ {
env->exception_index = EXCP_DEBUG; env->exception_index = EXCP_DEBUG;
cpu_loop_exit(env); cpu_loop_exit(env);

378
target-i386/ops_sse.h
View File

File diff suppressed because it is too large Load Diff

332
target-i386/ops_sse_header.h
View File

@ -34,31 +34,31 @@
#define dh_is_signed_XMMReg dh_is_signed_ptr #define dh_is_signed_XMMReg dh_is_signed_ptr
#define dh_is_signed_MMXReg dh_is_signed_ptr #define dh_is_signed_MMXReg dh_is_signed_ptr
DEF_HELPER_2(glue(psrlw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psrlw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(psraw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psraw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(psllw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psllw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(psrld, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psrld, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(psrad, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psrad, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pslld, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pslld, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(psrlq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psrlq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(psllq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psllq, SUFFIX), void, env, Reg, Reg)
#if SHIFT == 1 #if SHIFT == 1
DEF_HELPER_2(glue(psrldq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psrldq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pslldq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
#endif #endif
#define SSE_HELPER_B(name, F)\ #define SSE_HELPER_B(name, F)\
DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
#define SSE_HELPER_W(name, F)\ #define SSE_HELPER_W(name, F)\
DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
#define SSE_HELPER_L(name, F)\ #define SSE_HELPER_L(name, F)\
DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
#define SSE_HELPER_Q(name, F)\ #define SSE_HELPER_Q(name, F)\
DEF_HELPER_2(glue(name, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
SSE_HELPER_B(paddb, FADD) SSE_HELPER_B(paddb, FADD)
SSE_HELPER_W(paddw, FADD) SSE_HELPER_W(paddw, FADD)
@ -109,11 +109,11 @@ SSE_HELPER_W(pmulhw, FMULHW)
SSE_HELPER_B(pavgb, FAVG) SSE_HELPER_B(pavgb, FAVG)
SSE_HELPER_W(pavgw, FAVG) SSE_HELPER_W(pavgw, FAVG)
DEF_HELPER_2(glue(pmuludq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmuludq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmaddwd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmaddwd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(psadbw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psadbw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_3(glue(maskmov, SUFFIX), void, Reg, Reg, tl) DEF_HELPER_4(glue(maskmov, SUFFIX), void, env, Reg, Reg, tl)
DEF_HELPER_2(glue(movl_mm_T0, SUFFIX), void, Reg, i32) DEF_HELPER_2(glue(movl_mm_T0, SUFFIX), void, Reg, i32)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
DEF_HELPER_2(glue(movq_mm_T0, SUFFIX), void, Reg, i64) DEF_HELPER_2(glue(movq_mm_T0, SUFFIX), void, Reg, i64)
@ -133,11 +133,11 @@ DEF_HELPER_3(glue(pshufhw, SUFFIX), void, Reg, Reg, int)
/* FPU ops */ /* FPU ops */
/* XXX: not accurate */ /* XXX: not accurate */
#define SSE_HELPER_S(name, F)\ #define SSE_HELPER_S(name, F) \
DEF_HELPER_2(name ## ps , void, Reg, Reg) \ DEF_HELPER_3(name ## ps, void, env, Reg, Reg) \
DEF_HELPER_2(name ## ss , void, Reg, Reg) \ DEF_HELPER_3(name ## ss, void, env, Reg, Reg) \
DEF_HELPER_2(name ## pd , void, Reg, Reg) \ DEF_HELPER_3(name ## pd, void, env, Reg, Reg) \
DEF_HELPER_2(name ## sd , void, Reg, Reg) DEF_HELPER_3(name ## sd, void, env, Reg, Reg)
SSE_HELPER_S(add, FPU_ADD) SSE_HELPER_S(add, FPU_ADD)
SSE_HELPER_S(sub, FPU_SUB) SSE_HELPER_S(sub, FPU_SUB)
@ -148,64 +148,64 @@ SSE_HELPER_S(max, FPU_MAX)
SSE_HELPER_S(sqrt, FPU_SQRT) SSE_HELPER_S(sqrt, FPU_SQRT)
DEF_HELPER_2(cvtps2pd, void, Reg, Reg) DEF_HELPER_3(cvtps2pd, void, env, Reg, Reg)
DEF_HELPER_2(cvtpd2ps, void, Reg, Reg) DEF_HELPER_3(cvtpd2ps, void, env, Reg, Reg)
DEF_HELPER_2(cvtss2sd, void, Reg, Reg) DEF_HELPER_3(cvtss2sd, void, env, Reg, Reg)
DEF_HELPER_2(cvtsd2ss, void, Reg, Reg) DEF_HELPER_3(cvtsd2ss, void, env, Reg, Reg)
DEF_HELPER_2(cvtdq2ps, void, Reg, Reg) DEF_HELPER_3(cvtdq2ps, void, env, Reg, Reg)
DEF_HELPER_2(cvtdq2pd, void, Reg, Reg) DEF_HELPER_3(cvtdq2pd, void, env, Reg, Reg)
DEF_HELPER_2(cvtpi2ps, void, XMMReg, MMXReg) DEF_HELPER_3(cvtpi2ps, void, env, XMMReg, MMXReg)
DEF_HELPER_2(cvtpi2pd, void, XMMReg, MMXReg) DEF_HELPER_3(cvtpi2pd, void, env, XMMReg, MMXReg)
DEF_HELPER_2(cvtsi2ss, void, XMMReg, i32) DEF_HELPER_3(cvtsi2ss, void, env, XMMReg, i32)
DEF_HELPER_2(cvtsi2sd, void, XMMReg, i32) DEF_HELPER_3(cvtsi2sd, void, env, XMMReg, i32)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
DEF_HELPER_2(cvtsq2ss, void, XMMReg, i64) DEF_HELPER_3(cvtsq2ss, void, env, XMMReg, i64)
DEF_HELPER_2(cvtsq2sd, void, XMMReg, i64) DEF_HELPER_3(cvtsq2sd, void, env, XMMReg, i64)
#endif #endif
DEF_HELPER_2(cvtps2dq, void, XMMReg, XMMReg) DEF_HELPER_3(cvtps2dq, void, env, XMMReg, XMMReg)
DEF_HELPER_2(cvtpd2dq, void, XMMReg, XMMReg) DEF_HELPER_3(cvtpd2dq, void, env, XMMReg, XMMReg)
DEF_HELPER_2(cvtps2pi, void, MMXReg, XMMReg) DEF_HELPER_3(cvtps2pi, void, env, MMXReg, XMMReg)
DEF_HELPER_2(cvtpd2pi, void, MMXReg, XMMReg) DEF_HELPER_3(cvtpd2pi, void, env, MMXReg, XMMReg)
DEF_HELPER_1(cvtss2si, s32, XMMReg) DEF_HELPER_2(cvtss2si, s32, env, XMMReg)
DEF_HELPER_1(cvtsd2si, s32, XMMReg) DEF_HELPER_2(cvtsd2si, s32, env, XMMReg)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
DEF_HELPER_1(cvtss2sq, s64, XMMReg) DEF_HELPER_2(cvtss2sq, s64, env, XMMReg)
DEF_HELPER_1(cvtsd2sq, s64, XMMReg) DEF_HELPER_2(cvtsd2sq, s64, env, XMMReg)
#endif #endif
DEF_HELPER_2(cvttps2dq, void, XMMReg, XMMReg) DEF_HELPER_3(cvttps2dq, void, env, XMMReg, XMMReg)
DEF_HELPER_2(cvttpd2dq, void, XMMReg, XMMReg) DEF_HELPER_3(cvttpd2dq, void, env, XMMReg, XMMReg)
DEF_HELPER_2(cvttps2pi, void, MMXReg, XMMReg) DEF_HELPER_3(cvttps2pi, void, env, MMXReg, XMMReg)
DEF_HELPER_2(cvttpd2pi, void, MMXReg, XMMReg) DEF_HELPER_3(cvttpd2pi, void, env, MMXReg, XMMReg)
DEF_HELPER_1(cvttss2si, s32, XMMReg) DEF_HELPER_2(cvttss2si, s32, env, XMMReg)
DEF_HELPER_1(cvttsd2si, s32, XMMReg) DEF_HELPER_2(cvttsd2si, s32, env, XMMReg)
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
DEF_HELPER_1(cvttss2sq, s64, XMMReg) DEF_HELPER_2(cvttss2sq, s64, env, XMMReg)
DEF_HELPER_1(cvttsd2sq, s64, XMMReg) DEF_HELPER_2(cvttsd2sq, s64, env, XMMReg)
#endif #endif
DEF_HELPER_2(rsqrtps, void, XMMReg, XMMReg) DEF_HELPER_3(rsqrtps, void, env, XMMReg, XMMReg)
DEF_HELPER_2(rsqrtss, void, XMMReg, XMMReg) DEF_HELPER_3(rsqrtss, void, env, XMMReg, XMMReg)
DEF_HELPER_2(rcpps, void, XMMReg, XMMReg) DEF_HELPER_3(rcpps, void, env, XMMReg, XMMReg)
DEF_HELPER_2(rcpss, void, XMMReg, XMMReg) DEF_HELPER_3(rcpss, void, env, XMMReg, XMMReg)
DEF_HELPER_2(extrq_r, void, XMMReg, XMMReg) DEF_HELPER_3(extrq_r, void, env, XMMReg, XMMReg)
DEF_HELPER_3(extrq_i, void, XMMReg, int, int) DEF_HELPER_4(extrq_i, void, env, XMMReg, int, int)
DEF_HELPER_2(insertq_r, void, XMMReg, XMMReg) DEF_HELPER_3(insertq_r, void, env, XMMReg, XMMReg)
DEF_HELPER_3(insertq_i, void, XMMReg, int, int) DEF_HELPER_4(insertq_i, void, env, XMMReg, int, int)
DEF_HELPER_2(haddps, void, XMMReg, XMMReg) DEF_HELPER_3(haddps, void, env, XMMReg, XMMReg)
DEF_HELPER_2(haddpd, void, XMMReg, XMMReg) DEF_HELPER_3(haddpd, void, env, XMMReg, XMMReg)
DEF_HELPER_2(hsubps, void, XMMReg, XMMReg) DEF_HELPER_3(hsubps, void, env, XMMReg, XMMReg)
DEF_HELPER_2(hsubpd, void, XMMReg, XMMReg) DEF_HELPER_3(hsubpd, void, env, XMMReg, XMMReg)
DEF_HELPER_2(addsubps, void, XMMReg, XMMReg) DEF_HELPER_3(addsubps, void, env, XMMReg, XMMReg)
DEF_HELPER_2(addsubpd, void, XMMReg, XMMReg) DEF_HELPER_3(addsubpd, void, env, XMMReg, XMMReg)
#define SSE_HELPER_CMP(name, F)\ #define SSE_HELPER_CMP(name, F) \
DEF_HELPER_2( name ## ps , void, Reg, Reg) \ DEF_HELPER_3(name ## ps, void, env, Reg, Reg) \
DEF_HELPER_2( name ## ss , void, Reg, Reg) \ DEF_HELPER_3(name ## ss, void, env, Reg, Reg) \
DEF_HELPER_2( name ## pd , void, Reg, Reg) \ DEF_HELPER_3(name ## pd, void, env, Reg, Reg) \
DEF_HELPER_2( name ## sd , void, Reg, Reg) DEF_HELPER_3(name ## sd, void, env, Reg, Reg)
SSE_HELPER_CMP(cmpeq, FPU_CMPEQ) SSE_HELPER_CMP(cmpeq, FPU_CMPEQ)
SSE_HELPER_CMP(cmplt, FPU_CMPLT) SSE_HELPER_CMP(cmplt, FPU_CMPLT)
@ -216,124 +216,124 @@ SSE_HELPER_CMP(cmpnlt, FPU_CMPNLT)
SSE_HELPER_CMP(cmpnle, FPU_CMPNLE) SSE_HELPER_CMP(cmpnle, FPU_CMPNLE)
SSE_HELPER_CMP(cmpord, FPU_CMPORD) SSE_HELPER_CMP(cmpord, FPU_CMPORD)
DEF_HELPER_2(ucomiss, void, Reg, Reg) DEF_HELPER_3(ucomiss, void, env, Reg, Reg)
DEF_HELPER_2(comiss, void, Reg, Reg) DEF_HELPER_3(comiss, void, env, Reg, Reg)
DEF_HELPER_2(ucomisd, void, Reg, Reg) DEF_HELPER_3(ucomisd, void, env, Reg, Reg)
DEF_HELPER_2(comisd, void, Reg, Reg) DEF_HELPER_3(comisd, void, env, Reg, Reg)
DEF_HELPER_1(movmskps, i32, Reg) DEF_HELPER_2(movmskps, i32, env, Reg)
DEF_HELPER_1(movmskpd, i32, Reg) DEF_HELPER_2(movmskpd, i32, env, Reg)
#endif #endif
DEF_HELPER_1(glue(pmovmskb, SUFFIX), i32, Reg) DEF_HELPER_2(glue(pmovmskb, SUFFIX), i32, env, Reg)
DEF_HELPER_2(glue(packsswb, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(packsswb, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(packuswb, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(packuswb, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(packssdw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(packssdw, SUFFIX), void, env, Reg, Reg)
#define UNPCK_OP(base_name, base) \ #define UNPCK_OP(base_name, base) \
DEF_HELPER_2(glue(punpck ## base_name ## bw, SUFFIX) , void, Reg, Reg) \ DEF_HELPER_3(glue(punpck ## base_name ## bw, SUFFIX), void, env, Reg, Reg) \
DEF_HELPER_2(glue(punpck ## base_name ## wd, SUFFIX) , void, Reg, Reg) \ DEF_HELPER_3(glue(punpck ## base_name ## wd, SUFFIX), void, env, Reg, Reg) \
DEF_HELPER_2(glue(punpck ## base_name ## dq, SUFFIX) , void, Reg, Reg) DEF_HELPER_3(glue(punpck ## base_name ## dq, SUFFIX), void, env, Reg, Reg)
UNPCK_OP(l, 0) UNPCK_OP(l, 0)
UNPCK_OP(h, 1) UNPCK_OP(h, 1)
#if SHIFT == 1 #if SHIFT == 1
DEF_HELPER_2(glue(punpcklqdq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(punpcklqdq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(punpckhqdq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(punpckhqdq, SUFFIX), void, env, Reg, Reg)
#endif #endif
/* 3DNow! float ops */ /* 3DNow! float ops */
#if SHIFT == 0 #if SHIFT == 0
DEF_HELPER_2(pi2fd, void, MMXReg, MMXReg) DEF_HELPER_3(pi2fd, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pi2fw, void, MMXReg, MMXReg) DEF_HELPER_3(pi2fw, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pf2id, void, MMXReg, MMXReg) DEF_HELPER_3(pf2id, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pf2iw, void, MMXReg, MMXReg) DEF_HELPER_3(pf2iw, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfacc, void, MMXReg, MMXReg) DEF_HELPER_3(pfacc, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfadd, void, MMXReg, MMXReg) DEF_HELPER_3(pfadd, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfcmpeq, void, MMXReg, MMXReg) DEF_HELPER_3(pfcmpeq, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfcmpge, void, MMXReg, MMXReg) DEF_HELPER_3(pfcmpge, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfcmpgt, void, MMXReg, MMXReg) DEF_HELPER_3(pfcmpgt, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfmax, void, MMXReg, MMXReg) DEF_HELPER_3(pfmax, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfmin, void, MMXReg, MMXReg) DEF_HELPER_3(pfmin, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfmul, void, MMXReg, MMXReg) DEF_HELPER_3(pfmul, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfnacc, void, MMXReg, MMXReg) DEF_HELPER_3(pfnacc, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfpnacc, void, MMXReg, MMXReg) DEF_HELPER_3(pfpnacc, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfrcp, void, MMXReg, MMXReg) DEF_HELPER_3(pfrcp, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfrsqrt, void, MMXReg, MMXReg) DEF_HELPER_3(pfrsqrt, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfsub, void, MMXReg, MMXReg) DEF_HELPER_3(pfsub, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pfsubr, void, MMXReg, MMXReg) DEF_HELPER_3(pfsubr, void, env, MMXReg, MMXReg)
DEF_HELPER_2(pswapd, void, MMXReg, MMXReg) DEF_HELPER_3(pswapd, void, env, MMXReg, MMXReg)
#endif #endif
/* SSSE3 op helpers */ /* SSSE3 op helpers */
DEF_HELPER_2(glue(phaddw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(phaddw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(phaddd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(phaddd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(phaddsw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(phaddsw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(phsubw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(phsubw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(phsubd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(phsubd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(phsubsw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(phsubsw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pabsb, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pabsb, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pabsw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pabsw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pabsd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pabsd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmaddubsw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmaddubsw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmulhrsw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmulhrsw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pshufb, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pshufb, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(psignb, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psignb, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(psignw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psignw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(psignd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(psignd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_3(glue(palignr, SUFFIX), void, Reg, Reg, s32) DEF_HELPER_4(glue(palignr, SUFFIX), void, env, Reg, Reg, s32)
/* SSE4.1 op helpers */ /* SSE4.1 op helpers */
#if SHIFT == 1 #if SHIFT == 1
DEF_HELPER_2(glue(pblendvb, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pblendvb, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(blendvps, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(blendvps, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(blendvpd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(blendvpd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(ptest, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(ptest, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovsxbw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovsxbw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovsxbd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovsxbd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovsxbq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovsxbq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovsxwd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovsxwd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovsxwq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovsxwq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovsxdq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovsxdq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovzxbw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovzxbw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovzxbd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovzxbd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovzxbq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovzxbq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovzxwd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovzxwd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovzxwq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovzxwq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmovzxdq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmovzxdq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmuldq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmuldq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pcmpeqq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pcmpeqq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(packusdw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(packusdw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pminsb, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pminsb, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pminsd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pminsd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pminuw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pminuw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pminud, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pminud, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmaxsb, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmaxsb, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmaxsd, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmaxsd, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmaxuw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmaxuw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmaxud, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmaxud, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(pmulld, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pmulld, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_2(glue(phminposuw, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(phminposuw, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_3(glue(roundps, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(roundps, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(roundpd, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(roundpd, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(roundss, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(roundss, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(roundsd, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(roundsd, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(blendps, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(blendps, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(blendpd, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(blendpd, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(pblendw, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(pblendw, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(dpps, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(dpps, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(dppd, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(dppd, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(mpsadbw, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(mpsadbw, SUFFIX), void, env, Reg, Reg, i32)
#endif #endif
/* SSE4.2 op helpers */ /* SSE4.2 op helpers */
#if SHIFT == 1 #if SHIFT == 1
DEF_HELPER_2(glue(pcmpgtq, SUFFIX), void, Reg, Reg) DEF_HELPER_3(glue(pcmpgtq, SUFFIX), void, env, Reg, Reg)
DEF_HELPER_3(glue(pcmpestri, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(pcmpestri, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(pcmpestrm, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(pcmpestrm, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(pcmpistri, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(pcmpistri, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(glue(pcmpistrm, SUFFIX), void, Reg, Reg, i32) DEF_HELPER_4(glue(pcmpistrm, SUFFIX), void, env, Reg, Reg, i32)
DEF_HELPER_3(crc32, tl, i32, tl, i32) DEF_HELPER_3(crc32, tl, i32, tl, i32)
DEF_HELPER_2(popcnt, tl, tl, i32) DEF_HELPER_3(popcnt, tl, env, tl, i32)
#endif #endif
#undef SHIFT #undef SHIFT

434
target-i386/seg_helper.c
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File diff suppressed because it is too large Load Diff

10
target-i386/shift_helper_template.h
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@ -41,7 +41,8 @@
#error unhandled operand size #error unhandled operand size
#endif #endif
target_ulong glue(helper_rcl, SUFFIX)(target_ulong t0, target_ulong t1) target_ulong glue(helper_rcl, SUFFIX)(CPUX86State *env, target_ulong t0,
target_ulong t1)
{ {
int count, eflags; int count, eflags;
target_ulong src; target_ulong src;
@ -54,7 +55,7 @@ target_ulong glue(helper_rcl, SUFFIX)(target_ulong t0, target_ulong t1)
count = rclb_table[count]; count = rclb_table[count];
#endif #endif
if (count) { if (count) {
eflags = helper_cc_compute_all(CC_OP); eflags = helper_cc_compute_all(env, CC_OP);
t0 &= DATA_MASK; t0 &= DATA_MASK;
src = t0; src = t0;
res = (t0 << count) | ((target_ulong)(eflags & CC_C) << (count - 1)); res = (t0 << count) | ((target_ulong)(eflags & CC_C) << (count - 1));
@ -71,7 +72,8 @@ target_ulong glue(helper_rcl, SUFFIX)(target_ulong t0, target_ulong t1)
return t0; return t0;
} }
target_ulong glue(helper_rcr, SUFFIX)(target_ulong t0, target_ulong t1) target_ulong glue(helper_rcr, SUFFIX)(CPUX86State *env, target_ulong t0,
target_ulong t1)
{ {
int count, eflags; int count, eflags;
target_ulong src; target_ulong src;
@ -84,7 +86,7 @@ target_ulong glue(helper_rcr, SUFFIX)(target_ulong t0, target_ulong t1)
count = rclb_table[count]; count = rclb_table[count];
#endif #endif
if (count) { if (count) {
eflags = helper_cc_compute_all(CC_OP); eflags = helper_cc_compute_all(env, CC_OP);
t0 &= DATA_MASK; t0 &= DATA_MASK;
src = t0; src = t0;
res = (t0 >> count) | res = (t0 >> count) |

14
target-i386/smm_helper.c
View File

@ -18,18 +18,17 @@
*/ */
#include "cpu.h" #include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h" #include "helper.h"
/* SMM support */ /* SMM support */
#if defined(CONFIG_USER_ONLY) #if defined(CONFIG_USER_ONLY)
void do_smm_enter(CPUX86State *env1) void do_smm_enter(CPUX86State *env)
{ {
} }
void helper_rsm(void) void helper_rsm(CPUX86State *env)
{ {
} }
@ -41,15 +40,11 @@ void helper_rsm(void)
#define SMM_REVISION_ID 0x00020000 #define SMM_REVISION_ID 0x00020000
#endif #endif
void do_smm_enter(CPUX86State *env1) void do_smm_enter(CPUX86State *env)
{ {
target_ulong sm_state; target_ulong sm_state;
SegmentCache *dt; SegmentCache *dt;
int i, offset; int i, offset;
CPUX86State *saved_env;
saved_env = env;
env = env1;
qemu_log_mask(CPU_LOG_INT, "SMM: enter\n"); qemu_log_mask(CPU_LOG_INT, "SMM: enter\n");
log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP); log_cpu_state_mask(CPU_LOG_INT, env, X86_DUMP_CCOP);
@ -180,10 +175,9 @@ void do_smm_enter(CPUX86State *env1)
cpu_x86_update_cr4(env, 0); cpu_x86_update_cr4(env, 0);
env->dr[7] = 0x00000400; env->dr[7] = 0x00000400;
CC_OP = CC_OP_EFLAGS; CC_OP = CC_OP_EFLAGS;
env = saved_env;
} }
void helper_rsm(void) void helper_rsm(CPUX86State *env)
{ {
target_ulong sm_state; target_ulong sm_state;
int i, offset; int i, offset;

185
target-i386/svm_helper.c
View File

@ -18,46 +18,50 @@
*/ */
#include "cpu.h" #include "cpu.h"
#include "dyngen-exec.h" #include "cpu-all.h"
#include "helper.h" #include "helper.h"
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif /* !defined(CONFIG_USER_ONLY) */
/* Secure Virtual Machine helpers */ /* Secure Virtual Machine helpers */
#if defined(CONFIG_USER_ONLY) #if defined(CONFIG_USER_ONLY)
void helper_vmrun(int aflag, int next_eip_addend) void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
{ {
} }
void helper_vmmcall(void) void helper_vmmcall(CPUX86State *env)
{ {
} }
void helper_vmload(int aflag) void helper_vmload(CPUX86State *env, int aflag)
{ {
} }
void helper_vmsave(int aflag) void helper_vmsave(CPUX86State *env, int aflag)
{ {
} }
void helper_stgi(void) void helper_stgi(CPUX86State *env)
{ {
} }
void helper_clgi(void) void helper_clgi(CPUX86State *env)
{ {
} }
void helper_skinit(void) void helper_skinit(CPUX86State *env)
{ {
} }
void helper_invlpga(int aflag) void helper_invlpga(CPUX86State *env, int aflag)
{ {
} }
void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1)
{ {
} }
@ -65,7 +69,8 @@ void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, uint64_t exit_info_1)
{ {
} }
void helper_svm_check_intercept_param(uint32_t type, uint64_t param) void helper_svm_check_intercept_param(CPUX86State *env, uint32_t type,
uint64_t param)
{ {
} }
@ -74,13 +79,13 @@ void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type,
{ {
} }
void helper_svm_check_io(uint32_t port, uint32_t param, void helper_svm_check_io(CPUX86State *env, uint32_t port, uint32_t param,
uint32_t next_eip_addend) uint32_t next_eip_addend)
{ {
} }
#else #else
static inline void svm_save_seg(target_phys_addr_t addr, static inline void svm_save_seg(CPUX86State *env, target_phys_addr_t addr,
const SegmentCache *sc) const SegmentCache *sc)
{ {
stw_phys(addr + offsetof(struct vmcb_seg, selector), stw_phys(addr + offsetof(struct vmcb_seg, selector),
@ -93,7 +98,8 @@ static inline void svm_save_seg(target_phys_addr_t addr,
((sc->flags >> 8) & 0xff) | ((sc->flags >> 12) & 0x0f00)); ((sc->flags >> 8) & 0xff) | ((sc->flags >> 12) & 0x0f00));
} }
static inline void svm_load_seg(target_phys_addr_t addr, SegmentCache *sc) static inline void svm_load_seg(CPUX86State *env, target_phys_addr_t addr,
SegmentCache *sc)
{ {
unsigned int flags; unsigned int flags;
@ -104,23 +110,23 @@ static inline void svm_load_seg(target_phys_addr_t addr, SegmentCache *sc)
sc->flags = ((flags & 0xff) << 8) | ((flags & 0x0f00) << 12); sc->flags = ((flags & 0xff) << 8) | ((flags & 0x0f00) << 12);
} }
static inline void svm_load_seg_cache(target_phys_addr_t addr, static inline void svm_load_seg_cache(CPUX86State *env, target_phys_addr_t addr,
CPUX86State *env, int seg_reg) int seg_reg)
{ {
SegmentCache sc1, *sc = &sc1; SegmentCache sc1, *sc = &sc1;
svm_load_seg(addr, sc); svm_load_seg(env, addr, sc);
cpu_x86_load_seg_cache(env, seg_reg, sc->selector, cpu_x86_load_seg_cache(env, seg_reg, sc->selector,
sc->base, sc->limit, sc->flags); sc->base, sc->limit, sc->flags);
} }
void helper_vmrun(int aflag, int next_eip_addend) void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend)
{ {
target_ulong addr; target_ulong addr;
uint32_t event_inj; uint32_t event_inj;
uint32_t int_ctl; uint32_t int_ctl;
helper_svm_check_intercept_param(SVM_EXIT_VMRUN, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_VMRUN, 0);
if (aflag == 2) { if (aflag == 2) {
addr = EAX; addr = EAX;
@ -154,13 +160,13 @@ void helper_vmrun(int aflag, int next_eip_addend)
stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rflags), stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rflags),
cpu_compute_eflags(env)); cpu_compute_eflags(env));
svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.es), svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.es),
&env->segs[R_ES]); &env->segs[R_ES]);
svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.cs), svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.cs),
&env->segs[R_CS]); &env->segs[R_CS]);
svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.ss), svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.ss),
&env->segs[R_SS]); &env->segs[R_SS]);
svm_save_seg(env->vm_hsave + offsetof(struct vmcb, save.ds), svm_save_seg(env, env->vm_hsave + offsetof(struct vmcb, save.ds),
&env->segs[R_DS]); &env->segs[R_DS]);
stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip), stq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip),
@ -233,14 +239,14 @@ void helper_vmrun(int aflag, int next_eip_addend)
~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK));
CC_OP = CC_OP_EFLAGS; CC_OP = CC_OP_EFLAGS;
svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.es), svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.es),
env, R_ES); R_ES);
svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.cs), svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.cs),
env, R_CS); R_CS);
svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.ss), svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.ss),
env, R_SS); R_SS);
svm_load_seg_cache(env->vm_vmcb + offsetof(struct vmcb, save.ds), svm_load_seg_cache(env, env->vm_vmcb + offsetof(struct vmcb, save.ds),
env, R_DS); R_DS);
EIP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip)); EIP = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip));
env->eip = EIP; env->eip = EIP;
@ -320,17 +326,17 @@ void helper_vmrun(int aflag, int next_eip_addend)
} }
} }
void helper_vmmcall(void) void helper_vmmcall(CPUX86State *env)
{ {
helper_svm_check_intercept_param(SVM_EXIT_VMMCALL, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_VMMCALL, 0);
raise_exception(env, EXCP06_ILLOP); raise_exception(env, EXCP06_ILLOP);
} }
void helper_vmload(int aflag) void helper_vmload(CPUX86State *env, int aflag)
{ {
target_ulong addr; target_ulong addr;
helper_svm_check_intercept_param(SVM_EXIT_VMLOAD, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_VMLOAD, 0);
if (aflag == 2) { if (aflag == 2) {
addr = EAX; addr = EAX;
@ -340,17 +346,14 @@ void helper_vmload(int aflag)
qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmload! " TARGET_FMT_lx qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmload! " TARGET_FMT_lx
"\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n", "\nFS: %016" PRIx64 " | " TARGET_FMT_lx "\n",
addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)), addr, ldq_phys(addr + offsetof(struct vmcb,
save.fs.base)),
env->segs[R_FS].base); env->segs[R_FS].base);
svm_load_seg_cache(addr + offsetof(struct vmcb, save.fs), svm_load_seg_cache(env, addr + offsetof(struct vmcb, save.fs), R_FS);
env, R_FS); svm_load_seg_cache(env, addr + offsetof(struct vmcb, save.gs), R_GS);
svm_load_seg_cache(addr + offsetof(struct vmcb, save.gs), svm_load_seg(env, addr + offsetof(struct vmcb, save.tr), &env->tr);
env, R_GS); svm_load_seg(env, addr + offsetof(struct vmcb, save.ldtr), &env->ldt);
svm_load_seg(addr + offsetof(struct vmcb, save.tr),
&env->tr);
svm_load_seg(addr + offsetof(struct vmcb, save.ldtr),
&env->ldt);
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
env->kernelgsbase = ldq_phys(addr + offsetof(struct vmcb, env->kernelgsbase = ldq_phys(addr + offsetof(struct vmcb,
@ -367,11 +370,11 @@ void helper_vmload(int aflag)
save.sysenter_eip)); save.sysenter_eip));
} }
void helper_vmsave(int aflag) void helper_vmsave(CPUX86State *env, int aflag)
{ {
target_ulong addr; target_ulong addr;
helper_svm_check_intercept_param(SVM_EXIT_VMSAVE, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_VMSAVE, 0);
if (aflag == 2) { if (aflag == 2) {
addr = EAX; addr = EAX;
@ -384,13 +387,13 @@ void helper_vmsave(int aflag)
addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)), addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)),
env->segs[R_FS].base); env->segs[R_FS].base);
svm_save_seg(addr + offsetof(struct vmcb, save.fs), svm_save_seg(env, addr + offsetof(struct vmcb, save.fs),
&env->segs[R_FS]); &env->segs[R_FS]);
svm_save_seg(addr + offsetof(struct vmcb, save.gs), svm_save_seg(env, addr + offsetof(struct vmcb, save.gs),
&env->segs[R_GS]); &env->segs[R_GS]);
svm_save_seg(addr + offsetof(struct vmcb, save.tr), svm_save_seg(env, addr + offsetof(struct vmcb, save.tr),
&env->tr); &env->tr);
svm_save_seg(addr + offsetof(struct vmcb, save.ldtr), svm_save_seg(env, addr + offsetof(struct vmcb, save.ldtr),
&env->ldt); &env->ldt);
#ifdef TARGET_X86_64 #ifdef TARGET_X86_64
@ -408,30 +411,30 @@ void helper_vmsave(int aflag)
env->sysenter_eip); env->sysenter_eip);
} }
void helper_stgi(void) void helper_stgi(CPUX86State *env)
{ {
helper_svm_check_intercept_param(SVM_EXIT_STGI, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_STGI, 0);
env->hflags2 |= HF2_GIF_MASK; env->hflags2 |= HF2_GIF_MASK;
} }
void helper_clgi(void) void helper_clgi(CPUX86State *env)
{ {
helper_svm_check_intercept_param(SVM_EXIT_CLGI, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_CLGI, 0);
env->hflags2 &= ~HF2_GIF_MASK; env->hflags2 &= ~HF2_GIF_MASK;
} }
void helper_skinit(void) void helper_skinit(CPUX86State *env)
{ {
helper_svm_check_intercept_param(SVM_EXIT_SKINIT, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_SKINIT, 0);
/* XXX: not implemented */ /* XXX: not implemented */
raise_exception(env, EXCP06_ILLOP); raise_exception(env, EXCP06_ILLOP);
} }
void helper_invlpga(int aflag) void helper_invlpga(CPUX86State *env, int aflag)
{ {
target_ulong addr; target_ulong addr;
helper_svm_check_intercept_param(SVM_EXIT_INVLPGA, 0); cpu_svm_check_intercept_param(env, SVM_EXIT_INVLPGA, 0);
if (aflag == 2) { if (aflag == 2) {
addr = EAX; addr = EAX;
@ -444,7 +447,8 @@ void helper_invlpga(int aflag)
tlb_flush_page(env, addr); tlb_flush_page(env, addr);
} }
void helper_svm_check_intercept_param(uint32_t type, uint64_t param) void helper_svm_check_intercept_param(CPUX86State *env, uint32_t type,
uint64_t param)
{ {
if (likely(!(env->hflags & HF_SVMI_MASK))) { if (likely(!(env->hflags & HF_SVMI_MASK))) {
return; return;
@ -452,27 +456,27 @@ void helper_svm_check_intercept_param(uint32_t type, uint64_t param)
switch (type) { switch (type) {
case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR0 + 8: case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR0 + 8:
if (env->intercept_cr_read & (1 << (type - SVM_EXIT_READ_CR0))) { if (env->intercept_cr_read & (1 << (type - SVM_EXIT_READ_CR0))) {
helper_vmexit(type, param); helper_vmexit(env, type, param);
} }
break; break;
case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR0 + 8: case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR0 + 8:
if (env->intercept_cr_write & (1 << (type - SVM_EXIT_WRITE_CR0))) { if (env->intercept_cr_write & (1 << (type - SVM_EXIT_WRITE_CR0))) {
helper_vmexit(type, param); helper_vmexit(env, type, param);
} }
break; break;
case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR0 + 7: case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR0 + 7:
if (env->intercept_dr_read & (1 << (type - SVM_EXIT_READ_DR0))) { if (env->intercept_dr_read & (1 << (type - SVM_EXIT_READ_DR0))) {
helper_vmexit(type, param); helper_vmexit(env, type, param);
} }
break; break;
case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR0 + 7: case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR0 + 7:
if (env->intercept_dr_write & (1 << (type - SVM_EXIT_WRITE_DR0))) { if (env->intercept_dr_write & (1 << (type - SVM_EXIT_WRITE_DR0))) {
helper_vmexit(type, param); helper_vmexit(env, type, param);
} }
break; break;
case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 31: case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 31:
if (env->intercept_exceptions & (1 << (type - SVM_EXIT_EXCP_BASE))) { if (env->intercept_exceptions & (1 << (type - SVM_EXIT_EXCP_BASE))) {
helper_vmexit(type, param); helper_vmexit(env, type, param);
} }
break; break;
case SVM_EXIT_MSR: case SVM_EXIT_MSR:
@ -499,36 +503,31 @@ void helper_svm_check_intercept_param(uint32_t type, uint64_t param)
t0 %= 8; t0 %= 8;
break; break;
default: default:
helper_vmexit(type, param); helper_vmexit(env, type, param);
t0 = 0; t0 = 0;
t1 = 0; t1 = 0;
break; break;
} }
if (ldub_phys(addr + t1) & ((1 << param) << t0)) { if (ldub_phys(addr + t1) & ((1 << param) << t0)) {
helper_vmexit(type, param); helper_vmexit(env, type, param);
} }
} }
break; break;
default: default:
if (env->intercept & (1ULL << (type - SVM_EXIT_INTR))) { if (env->intercept & (1ULL << (type - SVM_EXIT_INTR))) {
helper_vmexit(type, param); helper_vmexit(env, type, param);
} }
break; break;
} }
} }
void cpu_svm_check_intercept_param(CPUX86State *env1, uint32_t type, void cpu_svm_check_intercept_param(CPUX86State *env, uint32_t type,
uint64_t param) uint64_t param)
{ {
CPUX86State *saved_env; helper_svm_check_intercept_param(env, type, param);
saved_env = env;
env = env1;
helper_svm_check_intercept_param(type, param);
env = saved_env;
} }
void helper_svm_check_io(uint32_t port, uint32_t param, void helper_svm_check_io(CPUX86State *env, uint32_t port, uint32_t param,
uint32_t next_eip_addend) uint32_t next_eip_addend)
{ {
if (env->intercept & (1ULL << (SVM_EXIT_IOIO - SVM_EXIT_INTR))) { if (env->intercept & (1ULL << (SVM_EXIT_IOIO - SVM_EXIT_INTR))) {
@ -541,13 +540,13 @@ void helper_svm_check_io(uint32_t port, uint32_t param,
/* next EIP */ /* next EIP */
stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2), stq_phys(env->vm_vmcb + offsetof(struct vmcb, control.exit_info_2),
env->eip + next_eip_addend); env->eip + next_eip_addend);
helper_vmexit(SVM_EXIT_IOIO, param | (port << 16)); helper_vmexit(env, SVM_EXIT_IOIO, param | (port << 16));
} }
} }
} }
/* Note: currently only 32 bits of exit_code are used */ /* Note: currently only 32 bits of exit_code are used */
void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1) void helper_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1)
{ {
uint32_t int_ctl; uint32_t int_ctl;
@ -567,13 +566,13 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
} }
/* Save the VM state in the vmcb */ /* Save the VM state in the vmcb */
svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.es), svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.es),
&env->segs[R_ES]); &env->segs[R_ES]);
svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.cs), svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.cs),
&env->segs[R_CS]); &env->segs[R_CS]);
svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.ss), svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.ss),
&env->segs[R_SS]); &env->segs[R_SS]);
svm_save_seg(env->vm_vmcb + offsetof(struct vmcb, save.ds), svm_save_seg(env, env->vm_vmcb + offsetof(struct vmcb, save.ds),
&env->segs[R_DS]); &env->segs[R_DS]);
stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base), stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base),
@ -602,7 +601,8 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rflags), stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rflags),
cpu_compute_eflags(env)); cpu_compute_eflags(env));
stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip), env->eip); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rip),
env->eip);
stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp), ESP); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rsp), ESP);
stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax), EAX); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.rax), EAX);
stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7), env->dr[7]); stq_phys(env->vm_vmcb + offsetof(struct vmcb, save.dr7), env->dr[7]);
@ -645,14 +645,14 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK)); ~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK));
CC_OP = CC_OP_EFLAGS; CC_OP = CC_OP_EFLAGS;
svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.es), svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.es),
env, R_ES); R_ES);
svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.cs), svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.cs),
env, R_CS); R_CS);
svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.ss), svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.ss),
env, R_SS); R_SS);
svm_load_seg_cache(env->vm_hsave + offsetof(struct vmcb, save.ds), svm_load_seg_cache(env, env->vm_hsave + offsetof(struct vmcb, save.ds),
env, R_DS); R_DS);
EIP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip)); EIP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rip));
ESP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rsp)); ESP = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.rsp));
@ -707,10 +707,9 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
cpu_loop_exit(env); cpu_loop_exit(env);
} }
void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, uint64_t exit_info_1) void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1)
{ {
env = nenv; helper_vmexit(env, exit_code, exit_info_1);
helper_vmexit(exit_code, exit_info_1);
} }
#endif #endif

903
target-i386/translate.c
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