mirror of https://github.com/xemu-project/xemu.git
target/sh4: Update coding style to make checkpatch.pl happy
Avoid checkpatch.pl warnings in the next commit. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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45514b48df
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02b8e735c1
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@ -398,9 +398,11 @@ float32 helper_fsrra_FT(CPUSH4State *env, float32 t0)
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/* "Approximate" 1/sqrt(x) via actual computation. */
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/* "Approximate" 1/sqrt(x) via actual computation. */
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t0 = float32_sqrt(t0, &env->fp_status);
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t0 = float32_sqrt(t0, &env->fp_status);
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t0 = float32_div(float32_one, t0, &env->fp_status);
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t0 = float32_div(float32_one, t0, &env->fp_status);
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/* Since this is supposed to be an approximation, an imprecision
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/*
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exception is required. One supposes this also follows the usual
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* Since this is supposed to be an approximation, an imprecision
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IEEE rule that other exceptions take precidence. */
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* exception is required. One supposes this also follows the usual
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* IEEE rule that other exceptions take precidence.
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*/
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if (get_float_exception_flags(&env->fp_status) == 0) {
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if (get_float_exception_flags(&env->fp_status) == 0) {
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set_float_exception_flags(float_flag_inexact, &env->fp_status);
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set_float_exception_flags(float_flag_inexact, &env->fp_status);
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}
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}
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@ -1959,9 +1959,11 @@ static void decode_gusa(DisasContext *ctx, CPUSH4State *env)
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NEXT_INSN;
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NEXT_INSN;
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switch (ctx->opcode & 0xf00f) {
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switch (ctx->opcode & 0xf00f) {
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case 0x6003: /* mov Rm,Rn */
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case 0x6003: /* mov Rm,Rn */
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/* Here we want to recognize ld_dst being saved for later consumtion,
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/*
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or for another input register being copied so that ld_dst need not
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* Here we want to recognize ld_dst being saved for later consumtion,
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be clobbered during the operation. */
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* or for another input register being copied so that ld_dst need not
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* be clobbered during the operation.
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*/
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op_dst = B11_8;
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op_dst = B11_8;
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mv_src = B7_4;
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mv_src = B7_4;
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if (op_dst == ld_dst) {
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if (op_dst == ld_dst) {
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