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pl022: convert to memory API 

Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Avi Kivity 2011-10-10 17:15:47 +02:00
parent 4848475794
commit 02a59c37b4
1 changed files with 11 additions and 18 deletions
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29
hw/pl022.c
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@ -42,6 +42,7 @@ do { fprintf(stderr, "pl022: error: " fmt , ## __VA_ARGS__);} while (0)
typedef struct { typedef struct {
SysBusDevice busdev; SysBusDevice busdev;
MemoryRegion iomem;
uint32_t cr0; uint32_t cr0;
uint32_t cr1; uint32_t cr1;
uint32_t bitmask; uint32_t bitmask;
@ -130,7 +131,8 @@ static void pl022_xfer(pl022_state *s)
pl022_update(s); pl022_update(s);
} }
static uint32_t pl022_read(void *opaque, target_phys_addr_t offset) static uint64_t pl022_read(void *opaque, target_phys_addr_t offset,
unsigned size)
{ {
pl022_state *s = (pl022_state *)opaque; pl022_state *s = (pl022_state *)opaque;
int val; int val;
@ -173,7 +175,7 @@ static uint32_t pl022_read(void *opaque, target_phys_addr_t offset)
} }
static void pl022_write(void *opaque, target_phys_addr_t offset, static void pl022_write(void *opaque, target_phys_addr_t offset,
uint32_t value) uint64_t value, unsigned size)
{ {
pl022_state *s = (pl022_state *)opaque; pl022_state *s = (pl022_state *)opaque;
@ -193,7 +195,7 @@ static void pl022_write(void *opaque, target_phys_addr_t offset,
break; break;
case 0x08: /* DR */ case 0x08: /* DR */
if (s->tx_fifo_len < 8) { if (s->tx_fifo_len < 8) {
DPRINTF("TX %02x\n", value); DPRINTF("TX %02x\n", (unsigned)value);
s->tx_fifo[s->tx_fifo_head] = value & s->bitmask; s->tx_fifo[s->tx_fifo_head] = value & s->bitmask;
s->tx_fifo_head = (s->tx_fifo_head + 1) & 7; s->tx_fifo_head = (s->tx_fifo_head + 1) & 7;
s->tx_fifo_len++; s->tx_fifo_len++;
@ -227,16 +229,10 @@ static void pl022_reset(pl022_state *s)
s->sr = PL022_SR_TFE | PL022_SR_TNF; s->sr = PL022_SR_TFE | PL022_SR_TNF;
} }
static CPUReadMemoryFunc * const pl022_readfn[] = { static const MemoryRegionOps pl022_ops = {
pl022_read, .read = pl022_read,
pl022_read, .write = pl022_write,
pl022_read .endianness = DEVICE_NATIVE_ENDIAN,
};
static CPUWriteMemoryFunc * const pl022_writefn[] = {
pl022_write,
pl022_write,
pl022_write
}; };
static const VMStateDescription vmstate_pl022 = { static const VMStateDescription vmstate_pl022 = {
@ -279,12 +275,9 @@ static const VMStateDescription vmstate_pl022 = {
static int pl022_init(SysBusDevice *dev) static int pl022_init(SysBusDevice *dev)
{ {
pl022_state *s = FROM_SYSBUS(pl022_state, dev); pl022_state *s = FROM_SYSBUS(pl022_state, dev);
int iomemtype;
iomemtype = cpu_register_io_memory(pl022_readfn, memory_region_init_io(&s->iomem, &pl022_ops, s, "pl022", 0x1000);
pl022_writefn, s, sysbus_init_mmio_region(dev, &s->iomem);
DEVICE_NATIVE_ENDIAN);
sysbus_init_mmio(dev, 0x1000, iomemtype);
sysbus_init_irq(dev, &s->irq); sysbus_init_irq(dev, &s->irq);
s->ssi = ssi_create_bus(&dev->qdev, "ssi"); s->ssi = ssi_create_bus(&dev->qdev, "ssi");
pl022_reset(s); pl022_reset(s);