mirror of https://github.com/xemu-project/xemu.git
ppc/pnv: Add support for NMI interface
This implements the NMI interface for the PNV machine, similarly to
commit 3431648272
("spapr: Add support for new NMI interface") for
SPAPR.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Message-Id: <20200325144147.221875-3-npiggin@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
parent
b5b7f39181
commit
01b552b05b
29
hw/ppc/pnv.c
29
hw/ppc/pnv.c
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@ -27,6 +27,7 @@
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#include "sysemu/runstate.h"
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#include "sysemu/runstate.h"
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#include "sysemu/cpus.h"
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#include "sysemu/cpus.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/hw_accel.h"
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#include "target/ppc/cpu.h"
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#include "target/ppc/cpu.h"
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#include "qemu/log.h"
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#include "qemu/log.h"
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#include "hw/ppc/fdt.h"
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#include "hw/ppc/fdt.h"
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@ -34,6 +35,7 @@
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#include "hw/ppc/pnv.h"
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#include "hw/ppc/pnv.h"
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#include "hw/ppc/pnv_core.h"
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#include "hw/ppc/pnv_core.h"
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#include "hw/loader.h"
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#include "hw/loader.h"
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#include "hw/nmi.h"
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#include "exec/address-spaces.h"
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#include "exec/address-spaces.h"
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#include "qapi/visitor.h"
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#include "qapi/visitor.h"
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#include "monitor/monitor.h"
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#include "monitor/monitor.h"
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@ -1977,10 +1979,35 @@ static void pnv_machine_set_hb(Object *obj, bool value, Error **errp)
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}
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}
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}
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}
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static void pnv_cpu_do_nmi_on_cpu(CPUState *cs, run_on_cpu_data arg)
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{
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PowerPCCPU *cpu = POWERPC_CPU(cs);
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CPUPPCState *env = &cpu->env;
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cpu_synchronize_state(cs);
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ppc_cpu_do_system_reset(cs);
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/*
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* SRR1[42:45] is set to 0100 which the ISA defines as implementation
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* dependent. POWER processors use this for xscom triggered interrupts,
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* which come from the BMC or NMI IPIs.
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*/
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env->spr[SPR_SRR1] |= PPC_BIT(43);
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}
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static void pnv_nmi(NMIState *n, int cpu_index, Error **errp)
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{
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CPUState *cs;
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CPU_FOREACH(cs) {
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async_run_on_cpu(cs, pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_NULL);
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}
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}
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static void pnv_machine_class_init(ObjectClass *oc, void *data)
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static void pnv_machine_class_init(ObjectClass *oc, void *data)
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{
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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MachineClass *mc = MACHINE_CLASS(oc);
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InterruptStatsProviderClass *ispc = INTERRUPT_STATS_PROVIDER_CLASS(oc);
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InterruptStatsProviderClass *ispc = INTERRUPT_STATS_PROVIDER_CLASS(oc);
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NMIClass *nc = NMI_CLASS(oc);
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mc->desc = "IBM PowerNV (Non-Virtualized)";
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mc->desc = "IBM PowerNV (Non-Virtualized)";
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mc->init = pnv_init;
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mc->init = pnv_init;
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@ -1997,6 +2024,7 @@ static void pnv_machine_class_init(ObjectClass *oc, void *data)
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mc->default_ram_size = INITRD_LOAD_ADDR + INITRD_MAX_SIZE;
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mc->default_ram_size = INITRD_LOAD_ADDR + INITRD_MAX_SIZE;
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mc->default_ram_id = "pnv.ram";
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mc->default_ram_id = "pnv.ram";
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ispc->print_info = pnv_pic_print_info;
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ispc->print_info = pnv_pic_print_info;
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nc->nmi_monitor_handler = pnv_nmi;
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object_class_property_add_bool(oc, "hb-mode",
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object_class_property_add_bool(oc, "hb-mode",
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pnv_machine_get_hb, pnv_machine_set_hb,
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pnv_machine_get_hb, pnv_machine_set_hb,
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@ -2060,6 +2088,7 @@ static const TypeInfo types[] = {
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.class_size = sizeof(PnvMachineClass),
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.class_size = sizeof(PnvMachineClass),
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.interfaces = (InterfaceInfo[]) {
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.interfaces = (InterfaceInfo[]) {
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{ TYPE_INTERRUPT_STATS_PROVIDER },
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{ TYPE_INTERRUPT_STATS_PROVIDER },
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{ TYPE_NMI },
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{ },
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{ },
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},
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},
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},
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},
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