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docs: explain effect of smp_read_barrier_depends() on modern architectures 

The documentation for smp_read_barrier_depends() does not mention the architectures
for which it is an optimization, for example ARM and PPC.  As a result, it is not
clear to the reader why one would use it.  Relegate Alpha to a footnote together
with other architectures where it is equivalent to smp_rmb().

Suggested-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2023-04-07 15:40:15 +02:00
parent 512c90c90e
commit 000eebcfe8
1 changed files with 7 additions and 4 deletions
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11
docs/devel/atomics.rst
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@ -220,10 +220,9 @@ They come in six kinds:
retrieves the address to which the second load will be directed), retrieves the address to which the second load will be directed),
the processor will guarantee that the first LOAD will appear to happen the processor will guarantee that the first LOAD will appear to happen
before the second with respect to the other components of the system. before the second with respect to the other components of the system.
However, this is not always true---for example, it was not true on Therefore, unlike ``smp_rmb()`` or ``qatomic_load_acquire()``,
Alpha processors. Whenever this kind of access happens to shared ``smp_read_barrier_depends()`` can be just a compiler barrier on
memory (that is not protected by a lock), a read barrier is needed, weakly-ordered architectures such as Arm or PPC[#]_.
and ``smp_read_barrier_depends()`` can be used instead of ``smp_rmb()``.
Note that the first load really has to have a _data_ dependency and not Note that the first load really has to have a _data_ dependency and not
a control dependency. If the address for the second load is dependent a control dependency. If the address for the second load is dependent
@ -231,6 +230,10 @@ They come in six kinds:
than actually loading the address itself, then it's a _control_ than actually loading the address itself, then it's a _control_
dependency and a full read barrier or better is required. dependency and a full read barrier or better is required.
.. [#] The DEC Alpha is an exception, because ``smp_read_barrier_depends()``
needs a processor barrier. On strongly-ordered architectures such
as x86 or s390, ``smp_rmb()`` and ``qatomic_load_acquire()`` can
also be compiler barriers only.
Memory barriers and ``qatomic_load_acquire``/``qatomic_store_release`` are Memory barriers and ``qatomic_load_acquire``/``qatomic_store_release`` are
mostly used when a data structure has one thread that is always a writer mostly used when a data structure has one thread that is always a writer