2021-09-23 21:19:33 +00:00
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/*
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* arm signal functions
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*
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* Copyright (c) 2013 Stacey D. Son
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu.h"
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/*
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* Compare to arm/arm/machdep.c sendsig()
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* Assumes that target stack frame memory is locked.
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*/
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abi_long set_sigtramp_args(CPUARMState *env, int sig,
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struct target_sigframe *frame,
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abi_ulong frame_addr,
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struct target_sigaction *ka)
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{
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/*
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* Arguments to signal handler:
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* r0 = signal number
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* r1 = siginfo pointer
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* r2 = ucontext pointer
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* r5 = ucontext pointer
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* pc = signal handler pointer
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* sp = sigframe struct pointer
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* lr = sigtramp at base of user stack
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*/
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env->regs[0] = sig;
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env->regs[1] = frame_addr +
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offsetof(struct target_sigframe, sf_si);
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env->regs[2] = frame_addr +
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offsetof(struct target_sigframe, sf_uc);
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/* the trampoline uses r5 as the uc address */
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env->regs[5] = frame_addr +
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offsetof(struct target_sigframe, sf_uc);
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env->regs[TARGET_REG_PC] = ka->_sa_handler & ~1;
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env->regs[TARGET_REG_SP] = frame_addr;
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env->regs[TARGET_REG_LR] = TARGET_PS_STRINGS - TARGET_SZSIGCODE;
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/*
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* Low bit indicates whether or not we're entering thumb mode.
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*/
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cpsr_write(env, (ka->_sa_handler & 1) * CPSR_T, CPSR_T, CPSRWriteByInstr);
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return 0;
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}
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2021-09-23 21:22:12 +00:00
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/*
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* Compare to arm/arm/machdep.c get_mcontext()
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* Assumes that the memory is locked if mcp points to user memory.
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*/
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abi_long get_mcontext(CPUARMState *env, target_mcontext_t *mcp, int flags)
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{
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int err = 0;
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uint32_t *gr = mcp->__gregs;
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if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(target_mcontext_vfp_t)) {
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return -TARGET_EINVAL;
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}
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gr[TARGET_REG_CPSR] = tswap32(cpsr_read(env));
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if (flags & TARGET_MC_GET_CLEAR_RET) {
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gr[TARGET_REG_R0] = 0;
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gr[TARGET_REG_CPSR] &= ~CPSR_C;
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} else {
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gr[TARGET_REG_R0] = tswap32(env->regs[0]);
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}
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gr[TARGET_REG_R1] = tswap32(env->regs[1]);
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gr[TARGET_REG_R2] = tswap32(env->regs[2]);
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gr[TARGET_REG_R3] = tswap32(env->regs[3]);
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gr[TARGET_REG_R4] = tswap32(env->regs[4]);
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gr[TARGET_REG_R5] = tswap32(env->regs[5]);
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gr[TARGET_REG_R6] = tswap32(env->regs[6]);
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gr[TARGET_REG_R7] = tswap32(env->regs[7]);
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gr[TARGET_REG_R8] = tswap32(env->regs[8]);
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gr[TARGET_REG_R9] = tswap32(env->regs[9]);
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gr[TARGET_REG_R10] = tswap32(env->regs[10]);
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gr[TARGET_REG_R11] = tswap32(env->regs[11]);
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gr[TARGET_REG_R12] = tswap32(env->regs[12]);
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gr[TARGET_REG_SP] = tswap32(env->regs[13]);
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gr[TARGET_REG_LR] = tswap32(env->regs[14]);
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gr[TARGET_REG_PC] = tswap32(env->regs[15]);
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if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr != 0) {
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/* see get_vfpcontext in sys/arm/arm/exec_machdep.c */
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target_mcontext_vfp_t *vfp;
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vfp = lock_user(VERIFY_WRITE, mcp->mc_vfp_ptr, sizeof(*vfp), 0);
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for (int i = 0; i < 32; i++) {
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vfp->mcv_reg[i] = tswap64(*aa32_vfp_dreg(env, i));
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}
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vfp->mcv_fpscr = tswap32(vfp_get_fpscr(env));
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unlock_user(vfp, mcp->mc_vfp_ptr, sizeof(*vfp));
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}
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return err;
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}
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