174 lines
3.5 KiB
C
174 lines
3.5 KiB
C
/* CpuArch.c -- CPU specific code
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2010-10-26: Igor Pavlov : Public domain */
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#include "CpuArch.h"
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#ifdef MY_CPU_X86_OR_AMD64
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#if (defined(_MSC_VER) && !defined(MY_CPU_AMD64)) || defined(__GNUC__)
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#define USE_ASM
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#endif
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#if defined(USE_ASM) && !defined(MY_CPU_AMD64)
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static UInt32 CheckFlag(UInt32 flag)
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{
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#ifdef _MSC_VER
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__asm pushfd;
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__asm pop EAX;
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__asm mov EDX, EAX;
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__asm xor EAX, flag;
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__asm push EAX;
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__asm popfd;
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__asm pushfd;
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__asm pop EAX;
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__asm xor EAX, EDX;
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__asm push EDX;
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__asm popfd;
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__asm and flag, EAX;
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#else
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__asm__ __volatile__ (
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"pushf\n\t"
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"pop %%EAX\n\t"
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"movl %%EAX,%%EDX\n\t"
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"xorl %0,%%EAX\n\t"
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"push %%EAX\n\t"
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"popf\n\t"
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"pushf\n\t"
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"pop %%EAX\n\t"
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"xorl %%EDX,%%EAX\n\t"
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"push %%EDX\n\t"
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"popf\n\t"
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"andl %%EAX, %0\n\t":
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"=c" (flag) : "c" (flag));
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#endif
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return flag;
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}
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#define CHECK_CPUID_IS_SUPPORTED if (CheckFlag(1 << 18) == 0 || CheckFlag(1 << 21) == 0) return False;
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#else
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#define CHECK_CPUID_IS_SUPPORTED
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#endif
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static void MyCPUID(UInt32 function, UInt32 *a, UInt32 *b, UInt32 *c, UInt32 *d)
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{
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#ifdef USE_ASM
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#ifdef _MSC_VER
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UInt32 a2, b2, c2, d2;
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__asm xor EBX, EBX;
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__asm xor ECX, ECX;
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__asm xor EDX, EDX;
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__asm mov EAX, function;
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__asm cpuid;
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__asm mov a2, EAX;
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__asm mov b2, EBX;
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__asm mov c2, ECX;
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__asm mov d2, EDX;
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*a = a2;
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*b = b2;
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*c = c2;
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*d = d2;
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#else
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// Mac cross-compile compiler:
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// can't find register in class 'BREG' while reloading 'asm'
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// so use class 'r' register var binding
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register _b asm("%bx");
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__asm__ __volatile__ (
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"cpuid"
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: "=a" (*a) ,
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"=r" (_b) ,
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"=c" (*c) ,
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"=d" (*d)
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: "0" (function)) ;
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*b = _b;
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#endif
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#else
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int CPUInfo[4];
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__cpuid(CPUInfo, function);
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*a = CPUInfo[0];
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*b = CPUInfo[1];
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*c = CPUInfo[2];
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*d = CPUInfo[3];
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#endif
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}
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Bool x86cpuid_CheckAndRead(Cx86cpuid *p)
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{
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CHECK_CPUID_IS_SUPPORTED
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MyCPUID(0, &p->maxFunc, &p->vendor[0], &p->vendor[2], &p->vendor[1]);
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MyCPUID(1, &p->ver, &p->b, &p->c, &p->d);
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return True;
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}
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static UInt32 kVendors[][3] =
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{
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{ 0x756E6547, 0x49656E69, 0x6C65746E},
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{ 0x68747541, 0x69746E65, 0x444D4163},
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{ 0x746E6543, 0x48727561, 0x736C7561}
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};
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int x86cpuid_GetFirm(const Cx86cpuid *p)
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{
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unsigned i;
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for (i = 0; i < sizeof(kVendors) / sizeof(kVendors[i]); i++)
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{
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const UInt32 *v = kVendors[i];
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if (v[0] == p->vendor[0] &&
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v[1] == p->vendor[1] &&
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v[2] == p->vendor[2])
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return (int)i;
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}
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return -1;
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}
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Bool CPU_Is_InOrder()
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{
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Cx86cpuid p;
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int firm;
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UInt32 family, model;
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if (!x86cpuid_CheckAndRead(&p))
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return True;
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family = x86cpuid_GetFamily(&p);
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model = x86cpuid_GetModel(&p);
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firm = x86cpuid_GetFirm(&p);
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switch (firm)
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{
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case CPU_FIRM_INTEL: return (family < 6 || (family == 6 && model == 0x100C));
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case CPU_FIRM_AMD: return (family < 5 || (family == 5 && (model < 6 || model == 0xA)));
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case CPU_FIRM_VIA: return (family < 6 || (family == 6 && model < 0xF));
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}
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return True;
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}
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#if !defined(MY_CPU_AMD64) && defined(_WIN32)
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static Bool CPU_Sys_Is_SSE_Supported()
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{
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OSVERSIONINFO vi;
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vi.dwOSVersionInfoSize = sizeof(vi);
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if (!GetVersionEx(&vi))
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return False;
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return (vi.dwMajorVersion >= 5);
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}
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#define CHECK_SYS_SSE_SUPPORT if (!CPU_Sys_Is_SSE_Supported()) return False;
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#else
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#define CHECK_SYS_SSE_SUPPORT
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#endif
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Bool CPU_Is_Aes_Supported()
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{
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Cx86cpuid p;
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CHECK_SYS_SSE_SUPPORT
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if (!x86cpuid_CheckAndRead(&p))
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return False;
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return (p.c >> 25) & 1;
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}
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#endif
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