Make the asm code increment lsl/lsr/asr rm by 4 if rm is pc. (ASM now passes the armwrestler MOV opcode test)
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@ -356,7 +356,11 @@ static void count(u32 opcode, int cond_res)
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EMIT2(and, KONST(0x1F), ecx)
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#define VALUE_LOAD_REG \
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EMIT2(and, KONST(0x0F), eax) \
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EMIT2(mov, REGREF2(eax,4), eax) \
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EMIT2(cmp, KONST(0x0F), eax) \
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EMIT2(mov, REGREF2(eax,4), eax) \
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EMIT1(jne, LABELREF(3,f)) \
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EMIT2(add, KONST(4), ax) \
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LABEL(3) \
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EMIT2(movzx, ch, ecx) \
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EMIT2(and, KONST(0x0F), ecx) \
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EMIT2(mov, REGREF2(ecx,4), ecx)
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