DMA:Linger last DMA on bus (Backport 511e58c849)

This commit is contained in:
negativeExponent 2021-05-21 17:37:58 +08:00
parent 025f3079b1
commit a9f35645b7
2 changed files with 11 additions and 8 deletions

View File

@ -49,8 +49,9 @@ bool busPrefetchEnable = false;
uint32_t busPrefetchCount = 0; uint32_t busPrefetchCount = 0;
int cpuDmaTicksToUpdate = 0; int cpuDmaTicksToUpdate = 0;
int cpuDmaCount = 0; int cpuDmaCount = 0;
bool cpuDmaHack = false; bool cpuDmaRunning = false;
uint32_t cpuDmaLast = 0; uint32_t cpuDmaLast = 0;
uint32_t cpuDmaPC = 0;
int dummyAddress = 0; int dummyAddress = 0;
bool cpuBreakLoop = false; bool cpuBreakLoop = false;
@ -2302,7 +2303,8 @@ void doDMA(uint32_t& s, uint32_t& d, uint32_t si, uint32_t di, uint32_t c, int t
int dw = 0; int dw = 0;
int sc = c; int sc = c;
cpuDmaHack = true; cpuDmaRunning = true;
cpuDmaPC = reg[15].I;
cpuDmaCount = c; cpuDmaCount = c;
// This is done to get the correct waitstates. // This is done to get the correct waitstates.
if (sm > 15) if (sm > 15)
@ -2367,7 +2369,7 @@ void doDMA(uint32_t& s, uint32_t& d, uint32_t si, uint32_t di, uint32_t c, int t
} }
cpuDmaTicksToUpdate += totalTicks; cpuDmaTicksToUpdate += totalTicks;
cpuDmaHack = false; cpuDmaRunning = false;
} }
void CPUCheckDMA(int reason, int dmamask) void CPUCheckDMA(int reason, int dmamask)
@ -3595,7 +3597,7 @@ void CPUReset()
systemSaveUpdateCounter = SYSTEM_SAVE_NOT_UPDATED; systemSaveUpdateCounter = SYSTEM_SAVE_NOT_UPDATED;
cpuDmaHack = false; cpuDmaRunning = false;
lastTime = systemGetClock(); lastTime = systemGetClock();

View File

@ -20,8 +20,9 @@ extern bool cpuSramEnabled;
extern bool cpuFlashEnabled; extern bool cpuFlashEnabled;
extern bool cpuEEPROMEnabled; extern bool cpuEEPROMEnabled;
extern bool cpuEEPROMSensorEnabled; extern bool cpuEEPROMSensorEnabled;
extern bool cpuDmaHack; extern bool cpuDmaRunning;
extern uint32_t cpuDmaLast; extern uint32_t cpuDmaLast;
extern uint32_t cpuDmaPC;
extern bool timer0On; extern bool timer0On;
extern int timer0Ticks; extern int timer0Ticks;
extern int timer0ClockReload; extern int timer0ClockReload;
@ -140,7 +141,7 @@ static inline uint32_t CPUReadMemory(uint32_t address)
armMode ? armNextPC - 4 : armNextPC - 2); armMode ? armNextPC - 4 : armNextPC - 2);
} }
#endif #endif
if (cpuDmaHack) { if (cpuDmaRunning || ((reg[15].I - cpuDmaPC) == (armState ? 4 : 2))) {
value = cpuDmaLast; value = cpuDmaLast;
} else { } else {
if (armState) { if (armState) {
@ -283,7 +284,7 @@ static inline uint32_t CPUReadHalfWord(uint32_t address)
// default // default
default: default:
unreadable: unreadable:
if (cpuDmaHack) { if (cpuDmaRunning|| ((reg[15].I - cpuDmaPC) == (armState ? 4 : 2))) {
value = cpuDmaLast & 0xFFFF; value = cpuDmaLast & 0xFFFF;
} else { } else {
int param = reg[15].I; int param = reg[15].I;
@ -416,7 +417,7 @@ static inline uint8_t CPUReadByte(uint32_t address)
armMode ? armNextPC - 4 : armNextPC - 2); armMode ? armNextPC - 4 : armNextPC - 2);
} }
#endif #endif
if (cpuDmaHack) { if (cpuDmaRunning || ((reg[15].I - cpuDmaPC) == (armState ? 4 : 2))) {
return cpuDmaLast & 0xFF; return cpuDmaLast & 0xFF;
} else { } else {
if (armState) { if (armState) {